em78p210n ELAN Microelectronics Corp, em78p210n Datasheet - Page 45
em78p210n
Manufacturer Part Number
em78p210n
Description
8-bit Microcontroller With Otp Rom
Manufacturer
ELAN Microelectronics Corp
Datasheet
1.EM78P210N.pdf
(76 pages)
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EM78P210N
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Product Specification (V1.2) 04.22.2008
(This specification is subject to change without further notice)
The following figure shows the Comparator Output Block Diagram.
6.7.3
6.7.3.1
Bit 2 (CMPWE): Comparator wake-up enable bit
Bit 0 (CMPIF):
EX1IF
Bit 7
To CMPOUT
■ The highest priority of P71/INT1/CO is INT1. When EIS1=0, the working type of
■ The CO and P71of the P71/CO pins cannot be used at the same time.
■ The P71/CO pin priority is as follows:
P71/INT1/CO is determined by CMPCOS1 and CMPCOS2.
Using a Comparator as an Operation Amplifier
Bank 0-RE (WUCR: Wake-up Control Register)
To C0
Figure 6-12 Comparator Output Configuration
Bit 6
0
CMRD
0 = Disable Comparator wake-up
1 = Enable Comparator wake-up
When the Comparator output status change is used to enter an
Comparator interrupt flag. Set when a change occurs in the
Comparator output. Reset by software
interrupt vector or to wake-up the EM78P210N from sleep, the
CMPWE bit must be set to “Enable“.
/INT1
High
Bit 5
0
Q
P71/INT1/CO Pin Priority
RESET
EN
ICWE
Bit 4
D
Medium
NOTE
CO
Bit 3
8-Bit Microcontroller with OTP ROM
0
comparator
Q
From
other
CMRD
EN
From OP I/
CMPWE
D
Bit 2
Low
P71
O
CMPIF
To
Bit 1
0
EM78P210N
CMPIF
Bit 0
• 39
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