IDT72V36100 IDT [Integrated Device Technology], IDT72V36100 Datasheet - Page 27

• Manufacturer Part Number: IDT72V36100
• Manufacturer: IDT [Integrated Device Technology]

NOTES:
1. Retransmit setup is complete after EF returns HIGH, only then can a read operation begin.
2. OE = LOW.
3. W
4. No more than D - 2 may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, FF will be HIGH throughout the Retransmit setup procedure.
5. There must be at least two words written to the FIFO before a Retransmit operation can be invoked.
6. RM is set HIGH during MRS.
IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II
1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36
Q
WCLK
0
D = 1,024 for IDT72V3640, 2,048 for IDT72V3650, 4,096 for IDT72V3660, 8,192 for IDT72V3670, 16,384 for the IDT72V3680, 32,768 for the IDT72V3690, 65,536 for the IDT72V36100
and 131,072 for the IDT72V36110.
RCLK
WEN
REN
1
PAE
- Q
PAF
= first word written to the FIFO after Master Reset, W
HF
EF
RT
n
t
ENS
W
x
t
t
A
ENH
t
ENS
t
RTS
t
RTS
Figure 11. Retransmit Timing (IDT Standard Mode)
2
= second word written to the FIFO after Master Reset.
t
t
t
ENH
REF
HF
t
SKEW2
1
W
TM
x+1
36-BIT FIFO
27
2
t
PAFS
1
t
REF
t
ENS
2
t
t
A
PAES
COMMERCIAL AND INDUSTRIAL
W
TEMPERATURE RANGES
1
(3)
4667 drw 16
t
t
ENH
A
W
2
(3)