m27651 Mindspeed Technologies, m27651 Datasheet - Page 4

• Manufacturer Part Number: m27651
• Description: Mindcontroller? Oc-12 Atm Shaper
• Manufacturer: Mindspeed Technologies

Product Highlights
Functions
www.mindspeed.com/salesoffices
4000 MacArthur Blvd., East Tower
• ATM Forum TM 4.0-compliant
• OC-12 throughput
• Supports 64K connections
• Dual GCRAs per connection
• Supports the following
• Shaping rates configurable from 22
• Per-connection queuing with EPD
• Per-buffer class and per-VC buffer
• Supports both VP and VC switching
• VP (or tunnel) shaping ofchannel-
U.S.and Canada: [phone]
Newport Beach, CA 92660-3007
Headquarters – Newport Beach
thresholds
switched VCs
traffic shaping
conformance definitions:
cells per second to line rat e, with
accuracy to within one percent
and PPD
- CBR.1
- VBR.1
- UBR.1
- UBR.2
International: [phone]
Order# 500108 A M01-0405
General Information:
© 2001 Mindspeed Technologies
and the Mindspeed logo are tra d e m a r ks of Mindspeed Te c h n o l o g i e s. All other
t ra d e m a r ks are the pro p e rty of their respective owners. Although Mindspeed
Technologies strives for accuracy in all its publications, this material may contain
e rro rs or omissions and is subject to change without notice. This material is prov i d e d
as is and without any express or implied warranties, including merchantability, fitness
for a particular purpose and non-infringement. Mindspeed Technologies shall not be
liable for any special, i n d i re c t , incidental or consequential damages as a result of its use.
• WRR access on unshaped
Physical Interfaces
UTOPIA
connections
• ATM header translation
• I.610 OAM processing
• Cell insertion and extraction
• Per-connection and per-port
• Level II-compliant,1-31 ports
• Master or slave mode
• Configurable as 8/16/32-bit
statistics
bus Tx/Rx
- F4/F5 alarms (with escalation)
- Loopback
- Continuity check
- Activation/deactivation
- Aggregate cell count
-Total discards
- AAL5 packets
- OAM cells
™
, a Conexant business. All rights reserved.Mindspeed
PCI
External Memory
SDRAM
SRAM
• Registered mode for high speeds
• Independently clocked to 100 MHz
• 2.5 Gbps bandwidth
• Revision 2.2/2.1-compliant
• 32-bit bus
• Independently clocked to 66 MHz
• 266 Mbps peak bandwidth
• PCI master and slave (target)
• 16-256 MB
• 64 bits wide
• Independently clocked up to
• 2 MB
• 32 bits wide
• Core frequency operation up
• Eight-word write buffer
100 MHz
to 132 MHz
Device Information
Ordering Information
M27651: M27651-13
• Power supply: 3.3 V, 2.5 V
• I/O voltage levels: 3.3 V
• Typical power dissipation: 3.9 W
• Package: 474 CBGA
• Body size: 32.5 x 25 mm
• Ball pitch: 1.27 mm
• ja(ºC/W): 12.6 still air; 9.9
• Operating temperature: -40ºC
• Maximum device junction
at 200 FPM
to +85ºC
temperature: 110ºC