zl50409 Zarlink Semiconductor, zl50409 Datasheet - Page 120

• Manufacturer Part Number: zl50409
• Description: Managed 9-port 10/100m Ethernet Switch
• Manufacturer: Zarlink Semiconductor

12.3.11.5
CPU Address: hF04
Accessed by CPU (RO)
This register provides various internal information as selected in DPST bit [4:0]. Refer to the PHY Port Control
Application Note, ZLAN-37.
12.3.11.6
CPU Address: hFFF
Accessed by CPU (RO)
Always return 8’h DA . Indicate the CPU interface or serial port connection is good.
Bit [0]
Bit [1]
Bit [2]
Bit [3]
Bit [4]
Bit [5]
Bit [6]
Bit [7]
Bits [7:0]
DTST – Data read back register
DA – Dead or Alive Register
Flow control enable
1: Flow control
0: No flow control
Full duplex port
1: Full duplex
0: Half duplex
Fast Ethernet port
1: FE Port
Link is down
1: Link down
0: Link up
Auto negotiation disabled
1: Disable
0: Enable
Reserved
Reserved
Module detected (for hot swap purpose)
0: No module
1: Module detected
Note: If Module Detect feature is disabled (bootstrap TSTOUT[9]=’0’), this bit
will always be ‘1’.
Always return DA
Zarlink Semiconductor Inc.
ZL50409
120
Data Sheet