ak4651 AKM Semiconductor, Inc., ak4651 Datasheet - Page 44

• Manufacturer Part Number: ak4651
• Description: 16bit ?? Codec With Mic/hp/spk-amp
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
The AK4651 communicates with its companion AC ‘97 controller via a digital serial link, “AC-link”. All digital audio
streams, and command/status information are communicated over this point to point serial interconnect. A breakout of the
signals connecting the two is shown in the following figure.
The AK4651 incorporates a 5 pin digital serial interface that links it to the AC ’97 controller. AC-link is a bi-directional,
fixed rate(48kHz), serial PCM digital stream. It handles input/output audio streams as well as control register accesses
employing a time division multiplexed (TDM) scheme. The AC-link architecture divides each audio frame into 12
outgoing and 12 incoming data streams, each with 20-bit sample resolution. DAC and ADC resolution of the AK4651 is
16 bit resolution. The data streams currently defined by the AC ‘97 specification include:
SYNC, fixed at 48kHz, is derived by dividing down the serial bit clock (BITCLK) output from the AK4651. BITCLK,
fixed at 12.288 MHz, provides the necessary clocking granularity to support 12, 20-bit outgoing and incoming time slots.
AC-link serial data is transitioned on each rising edge of BITCLK. The receiver of AC-link data, the AK4651 for
outgoing data and AC ’97 controller for incoming data, samples each serial bit on the falling edges of BITCLK.
The AC-link protocol provides for a special 16-bit slot (Slot 0) wherein each bit conveys a valid tag for its corresponding
time slot within the current audio frame. A “1” in a given bit position of slot 0 indicates that the corresponding time slot
within the current audio frame has been assigned to a data stream, and contains valid data. If a slot is “Tagged” invalid, it
is the responsibility of the source of the data (the AK4651 for the input stream, AC ’97 controller for the output stream),
to stuff all bit positions with 0’s during that slot’s active time.
SYNC remains high for a total duration of 16 BITCLKs at the beginning of each audio frame. The portion of the audio
frame where SYNC is high is defined as the “Tag Phase”. The remainder of the audio frame where SYNC is low is
defined as the “Data Phase”.
MS0503-E-00
PCM Playback
PCM Record data
Control
Status
Connection with Digital AC ’97 Controller
Digital Interface
2 channel composite PCM output stream
1 channel composite PCM input stream
Control register write port
Control register read port
RESETN
BITCLK
SYNC
SDATAIN
SDATAOUT
2 output slots
2 input slots
2 output slots
2 input slots
Figure 33. Connection between AK4651 and AC ’97 controller
(Output) : 12.288MHz clock output from the AK4651
(Output) : Data signal input to the controller (output from the AK4651)
(Input) : Control signal to reset the AK4651
(Input) : Control signal to synchronize the AK4651 with AC’97 controller
(Input) : Data signal output to the controller (input from the AK4651)
AC’97
Controller
SYNC
BITCLK
SDATAOUT
SDATAIN
RESETN
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AK4651
[AK4651]
2006/04