ak4671 AKM Semiconductor, Inc., ak4671 Datasheet - Page 162
ak4671
Manufacturer Part Number
ak4671
Description
Stereo Codec With Mic/rcv/hp-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
1.AK4671.pdf
(164 pages)
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■
Master clock can be stopped when ADC and DAC are not used.
1. PCM I/F A Slave Mode
2. PCM I/F A Master Mode
■
Power supply current can be shut down (typ. 20 μ A) by stopping clocks and setting PMVCM bit = “0” after all blocks
except for VCOM are powered-down. Power supply current can be also shut down (typ. 1 μ A) by stopping clocks and
setting the PDN pin = “L”. When the PDN pin = “L”, the registers are initialized.
MS0666-E-00
External SYNCA
External SYNCB
External BICKA
External BICKB
<Example>
< Example >
Power down
Stop of Clock
PMPCM bit
(Addr:53H, D2)
PMPCM bit
(Ad d r:5 3 H , D 2 )
SYNCA
BICKA
(1) Power down PLLBT: PMPCM bit = “1” → “0”
(2) Stop the external SYNCA and BICKA clocks
(1) Power down PLLBT: PMPCM bit = “1” → “0”
(2) Stop the external SYNCB and BICKB clocks. SYNCA and BICKA are fixed to “H” or “L”.
Output
Output
Input
Input
Input
Input
(1 )
(1)
(2)
(2 )
(2)
(2 )
Figure 127. Clock Stopping Sequence (1)
Figure 128. Clock Stopping Sequence (2)
"H" or "L"
"H" or "L"
- 162 -
Example
Example
PCM I/F A Format : Linear, Short Frame (ADC & DAC)
PCM I/F A Format : Linear, Short Frame (ADC & DAC)
Sampling Frequency: 8kHz
Sampling Frequency: 8kHz
PLLBT Reference clock: SYNCB
SYNCB frequency: 1fs2
PLLBT Reference clock: SYNCA
SYNCA frequency: 1fs2
(2) Stop the external clocks
(2) Stop the external clocks
(1) Addr:53H, Data:00H
(1) Addr:53H, Data:00H
[AK4671]
2007/10
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