ak4671 AKM Semiconductor, Inc., ak4671 Datasheet - Page 153

• Manufacturer Part Number: ak4671
• Description: Stereo Codec With Mic/rcv/hp-amp
• Manufacturer: AKM Semiconductor, Inc.

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MS0666-E-00
<Example>
Headphone-Amp Output
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bits). When the AK4671 is PLL mode, DAC and Headphone-Amp should
(2) Set up the path of “SDTI
(3) Enable 5-band Equalizer: EQ bit = “0”
(4) Set up the output digital volume (Addr: 1AH and 1BH)
(5) Power up DAC: PMDAL = PMDAR bits = “0” → “1”
(6) Power up Headphone-Amp and MIX-Amp: PMLO2 = PMRO2 = PMLO2S = PMRO2S bits = “0” → “1”
(7) Rise up the common voltage of Headphone-Amp: MUTEN bit = “0” → “1”
(8) Fall down the common voltage of Headphone-Amp: MUTEN bit = “1” → “0”
(9) Power down Headphone-Amp and MIX-Amp: PMLO2 = PMRO2 = PMLO2S = PMRO2S bits = “1” → “0”
(10) Power down DAC: PMDAL = PMDAR bits = “1” → “0”
(11) Disable 5-band Equalizer: EQ bit = “1”
(12) Disable the path of “DAC → Headphone-Amp”: DACHL = DACHR bits = “1” → “0”
PML/RO2S bits
(Addr:0B&0CH, D0)
(Addr:1AH&1BH, D7-0)
OVL/R7-0 bits
DACHL/R bits
PMDAL/R bits
PML/RO2 bits
(Addr:01H, D7-4)
(Addr:10H, D6-5)
(Addr:10H, D1-0)
HPG3-0 bits
(Addr:00H, D7-6)
(Addr:08H, D7-4)
(Addr:18H, D3)
(Addr:10H, D2)
ROUT2 pin
FS3-0 bits
MUTEN bit
LOUT2 pin
be powered-up in consideration of PLL lock time after a sampling frequency is changed.
Set up analog volume for HP-Amp (Addr: 08H, HPG3-0 bits)
EQ bit
When OVOLC bit is “1” (default), OVL7-0 bits set the volume of both channels. After DAC is powered-up,
the digital volume changes from default value (0dB) to the register setting value by the soft transition.
Output voltages of Headphone-Amp are still VSS1.
The rise time depends on AVDD and the capacitor value connected with the MUTET pin. When AVDD=3.3V
and the capacitor value is 1.0 μ F, the time constant is τ r = 250ms(max.).
If the power supply is powered-off or Headphone-Amp is powered-down before the common voltage goes to
VSS2, the pop noise occurs. It takes twice of τ f that the common voltage goes to VSS2.
The fall time depends on AVDD and the capacitor value connected with the MUTET pin. When AVDD=3.3V
and the capacitor value is 1.0 μ F, the time constant is τ f = 250ms(max.).
(Headphone Playback: SDTI → Audio I/F → EQ → DATT → DACL/R → LOUT2/ROUT2)
1011
0000
18H
0
(1)
(2)
(3)
Figure 115. Headphone-Amp Output Sequence
(4)
DAC
(5)
(6)
(7)
HP-Amp”: DACHL = DACHR bits = “0” → “1”
Normal Output
“1” (Boost amount is selected by Addr = 50H-52H.)
1111
1010
“0”
28H
1
- 153 -
(8)
(9)
(10)
(11)
(12)
0
E x a m p le :
P L L M a s t e r M o d e
A u d i o I/F F o r m a t: M S B ju s tif i e d ( A D C & D A C )
S a m p l in g F r e q u e n c y : 4 4 . 1 k H z
O V O L C b it = “ 1 ” ( d e f a u lt)
D ig i t a l V o l u m e L e v e l : − 8 d B
H P V o lu m e L e v e l: − 3 d B
5 b a n d E Q : E n a b l e
( 1 ) A d d r :0 1 H , D a t a :F 4 H
( 2 ) A d d r :0 8 H , D a t a A 5 H
( 3 ) A d d r :1 8 H , D a t a 0 A H
( 4 ) A d d r :1 A H & 1 B H , D a ta 2 8 H
( 5 ) A d d r :0 0 H , D a t a C 1 H
( 6 ) A d d r :1 0 H , D a t a 6 3 H
( 7 ) A d d r :1 0 H , D a t a 6 7 H
( 8 ) A d d r :1 0 H , D a t a 6 3 H
( 9 ) A d d r :1 0 H , D a t a 0 0 H
( 1 0 ) A d d r : 0 0 H , D a ta 0 1 H
( 1 1 ) A d d r : 1 8 H , D a ta 0 2 H
( 1 2 ) A d d r : 0 B H & 0 C H , D a ta 0 0 H
A d d r :0 B H & 0 C H , D a t a 0 1 H
P la y b a c k
[AK4671]
2007/10