74HCT240N,652 NXP Semiconductors, 74HCT240N,652 Datasheet - Page 3

• Manufacturer Part Number: 74HCT240N,652
• Description: IC INVERTER DUAL 4-INPUT 20DIP
• Manufacturer: NXP Semiconductors
• Series: 74HCTr

Specifications of 74HCT240N,652

• Logic Type: Inverter
• Package / Case: 20-DIP (0.300", 7.62mm)
• Number Of Inputs: 4
• Number Of Circuits: 2
• Current - Output High, Low: 6mA, 6mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Logic Family: 74HCT
• Number Of Channels Per Chip: 8
• Polarity: Inverting
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: 125 C
• Mounting Style: Through Hole
• High Level Output Current: - 6 mA
• Low Level Output Current: 6 mA
• Maximum Power Dissipation: 750 mW
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 10 / 8
• Output Type: 3-State
• Propagation Delay Time: 9 ns
• Logical Function: Buffer/Line Driver
• Number Of Elements: 2
• Number Of Channels: 8
• Number Of Outputs: 8
• Operating Supply Voltage (typ): 5V
• Package Type: PDIP
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Quiescent Current: 8uA
• Technology: CMOS
• Pin Count: 20
• Mounting: Through Hole
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1527-5; 74HCT240N; 933670770652

NXP Semiconductors
5. Pinning information
Table 2.
74HC_HCT240_3
Product data sheet
Symbol
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
GND
2A3
1Y3
2A2
1Y2
2A1
1Y1
Fig 4. Pin configuration DIP20, SO20, (T)SSOP20
Pin description
GND
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
10
1
2
3
4
5
6
7
8
9
5.1 Pinning
5.2 Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
74HCT240
74HC240
001aag233
Description
output enable input (active LOW)
data input
bus output
data input
bus output
data input
bus output
data input
bus output
ground (0 V)
data input
bus output
data input
bus output
data input
bus output
20
19
18
17
16
15
14
13
12
11
V
2OE
1Y0
2A0
1Y1
2A1
1Y2
2A2
1Y3
2A3
CC
Rev. 03 — 2 August 2007
Fig 5. Pin configuration DHVQFN20
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
supply pin or input
index area
terminal 1
74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
Transparent top view
2
3
4
5
6
7
8
9
74HCT240
74HC240
GND
(1)
19
18
17
16
15
14
13
12
001aag234
© NXP B.V. 2007. All rights reserved.
2OE
1Y0
2A0
1Y1
2A1
1Y2
2A2
1Y3
3 of 18