ht82a836r Holtek Semiconductor Inc., ht82a836r Datasheet - Page 21

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ht82a836r

Manufacturer Part Number
ht82a836r
Description
Usb Audio Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet

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HT82A836R
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Configuring the Timer Mode
In this mode, the timer can be utilised to measure fixed
time intervals, providing an internal interrupt signal each
time the counter overflows. To operate in this mode, bits
TM1 and TM0 of the TMRC register must be set to 1 and
0 respectively. In this mode, the internal clock is used as
the timer clock. The input clock frequency to the timer is
f
the timer to run. Each time an internal clock high to low
transition occurs, the timer increments by one. When
the timer is full and overflows, the timer will be reset to
the value already loaded into the preload register and
continue counting. If the timer interrupt is enabled, an in-
terrupt signal will also be generated. The interrupt can
be disabled by ensuring that the Timer/Event Counter
Interrupt Enable bit in the Interrupt Control Register,
INTC0, is reset to zero.
Configuring the Event Counter Mode
In this mode, a number of externally changing logic
events, occurring on the external timer pin, can be re-
corded by the Timer/Event Counter. To operate in this
mode, the Operating Mode Select bit pair in the Timer
Control Register must be set to the correct value. In this
mode the external timer pin is used as the Timer/Event
Counter clock source. After the other bits in the Timer
Control Register have been setup, the enable bit, which
is bit 4 of the Timer Control Register, can be set high to
enable the Timer/Event Counter to run. If the Active
Edge Select bit, which is bit 3 of the Timer Control Reg-
ister, is low, the Timer/Event Counter will increment
each time the external timer pin receives a low to high
transition. If the Active Edge Select bit is high, the coun-
ter will increment each time the external timer pin re-
ceives a high to low transition. When it is full and
overflows, an interrupt signal is generated and the
Timer/Event Counter will reload the value already
loaded into the preload register and continue counting.
The interrupt can be disabled by ensuring that the
Timer/Event Counter Interrupt Enable bit in the Interrupt
Control Register, INTC0, is reset to zero.
Rev. 1.00
SYS
/4. The timer-on bit, TON, must be set high to enable
Event Counter Mode Timing Chart
Timer Mode Timing Chart
21
As the external timer pin is shared with an I/O pin, to en-
sure that the pin is configured to operate as an event
counter input pin, two things have to happen. The first is
to ensure that the Operating Mode Select bits in the
Timer Control Register place the Timer/Event Counter in
the Event Counting Mode, the second is to ensure that
the port control register configures the pin as an input. It
should be noted that in the event counting mode, even if
the microcontroller is in the Power Down Mode, the
Timer/Event Counter will continue to record externally
changing logic events on the timer input pin. As a result
when the timer overflows it will generate a timer interrupt
and corresponding wake-up source.
Configuring the Pulse Width Measurement Mode
In this mode, the Timer/Event Counter can be utilised to
measure the width of external pulses applied to the ex-
ternal timer pin. To operate in this mode, the Operating
Mode Select bit pair in the Timer Control Register must
be set to the correct value. In this mode the internal
clock, f
After the other bits in the Timer Control Register have
been setup, the enable bit, which is bit 4 of the Timer
Control Register, can be set high to enable the
Timer/Event Counter, however it will not actually start
counting until an active edge is received on the external
timer pin.
If the Active Edge Select bit, which is bit 3 of the Timer
Control Register, is low, once a high to low transition has
been received on the external timer pin, the Timer/Event
Counter will start counting until the external timer pin re-
turns to its original high level. At this point the enable bit
will be automatically reset to zero and the Timer/Event
Counter will stop counting. If the Active Edge Select bit
is high, the Timer/Event Counter will begin counting
once a low to high transition has been received on the
external timer pin and stop counting when the external
timer pin returns to its original low level. As before, the
enable bit will be automatically reset to zero and the
Timer/Event Counter will stop counting. It is important to
note that in the Pulse Width Measurement Mode, the
SYS
/4, is used as the Timer/Event Counter clock.
HT82A836R
March 20, 2008

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