wm8952 Wolfson Microelectronics plc, wm8952 Datasheet - Page 58

• Manufacturer Part Number: wm8952
• Description: Mono Adc With Microphone Pre-amplifier
• Manufacturer: Wolfson Microelectronics plc

WM8952
w
7 (07h)
8 (08h)
REGISTER
ADDRESS
4:2
1
0
15:6
6
5
4
3:1
0
15:8
7
6
5:4
3
BIT
BCLKDIV
MS
SOFT_START
TOGGLE
SR
SLOWCLKEN
MODE_GPIO
OPCLKDIV
GPIOPOL
LABEL
0
00h
0
00
0
000
0
0
00000
0
0
000
0
DEFAULT
Configures the BCLK and FRAME output frequency,
for use when the chip is master over BCLK.
000=divide by 1 (BCLK=MCLK)
001=divide by 2 (BCLK=MCLK/2)
010=divide by 4
011=divide by 8
100=divide by 16
101=divide by 32
110=reserved
111=reserved
Reserved
Sets the chip to be master over FRAME and BCLK
0=BCLK and FRAME clock are inputs
1=BCLK and FRAME clock are outputs generated by
the WM8952 (MASTER)
Reserved
Reserved
VMID Soft Start
0=disabled
1=enabled
Fast VMID Discharge
0=normal
1=enable (used during power-down)
Approximate sample rate (configures the coefficients
for the internal digital filters):
000=48kHz
001=32kHz
010=24kHz
011=16kHz
100=12kHz
101=8kHz
110-111=reserved
Enables the Timeout Clock for zero cross detection.
Reserved
Selects MODE as a GPIO pin
0 = MODE is an input. MODE selects 2-wire mode
when low and 3-wire mode when high.
1 = MODE can be an input or output under the control
of the GPIO control register. Interface operates in 3-
wire mode regardless of when happens on the MODE
pin.
Reserved
PLL Output clock division ratio
00=divide by 1
01=divide by 2
10=divide by 3
11=divide by 4
GPIO Polarity invert
0=Non inverted
1=Inverted
DESCRIPTION
PP, Rev 3.0, December 2008
Digital Audio
Interfaces
Digital Audio
Interfaces
POP Minimisation
POP Minimisation
Audio Sample
Rates
Zero Cross
Timeout
Control Interface
General Purpose
Input Output
General Purpose
Input Output
REFER TO
Pre Production
58