wm8952 Wolfson Microelectronics plc, wm8952 Datasheet - Page 42

• Manufacturer Part Number: wm8952
• Description: Mono Adc With Microphone Pre-amplifier
• Manufacturer: Wolfson Microelectronics plc

WM8952
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AUDIO SAMPLE RATES
Table 30 Clock Control
Table 31 Sample Rate Control
The WM8952 sample rates are set using the SR register bits. The cut-offs for the digital filters and
the ALC attack/decay times stated are determined using these values and assume a 256fs master
clock rate.
If a sample rate that is not explicitly supported by the SR register settings is required then the
closest SR value to that sample rate should be chosen, the filter characteristics and the ALC attack,
decay and hold times will scale appropriately.
R6
Clock
generation
control
R7
Additional
control
REGISTER
REGISTER
ADDRESS
ADDRESS
8
7:5
4:2
0
3:1
BIT
BIT
CLKSEL
MCLKDIV
BCLKDIV
MS
SR
LABEL
LABEL
000
1
010
000
0
DEFAULT
DEFAULT
Controls the source of the clock for all
internal operation:
0=MCLK
1=PLL output
Sets the scaling for either the MCLK or
PLL clock output (under control of
CLKSEL)
000=divide by 1
001=divide by 1.5
010=divide by 2
011=divide by 3
100=divide by 4
101=divide by 6
110=divide by 8
111=divide by 12
Configures the BCLK and FRAME output
frequency, for use when the chip is
master over BCLK.
000=divide by 1 (BCLK=MCLK)
001=divide by 2 (BCLK=MCLK/2)
010=divide by 4
011=divide by 8
100=divide by 16
101=divide by 32
110=reserved
111=reserved
Sets the chip to be master over FRAME
and BCLK
0=BCLK and FRAME clock are inputs
1=BCLK and FRAME clock are outputs
generated by the WM8952 (MASTER)
Approximate sample rate (configures the
coefficients for the internal digital filters):
000=48kHz
001=32kHz
010=24kHz
011=16kHz
100=12kHz
101=8kHz
110-111=reserved
PP, Rev 3.0, December 2008
DESCRIPTION
DESCRIPTION
Pre Production
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