wm8952 Wolfson Microelectronics plc, wm8952 Datasheet - Page 39

• Manufacturer Part Number: wm8952
• Description: Mono Adc With Microphone Pre-amplifier
• Manufacturer: Wolfson Microelectronics plc

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DIGITAL AUDIO INTERFACES
The audio interface has 3 pins:
The clock signals BCLK and FRAME can be outputs when the WM8952 operates as a master, or
inputs when it is a slave (see Master and Slave Mode Operation, below).
Four different audio data formats are supported:
All of these modes are MSB first. They are described in Audio Data Formats, below. Refer to the
Electrical Characteristic section for timing information.
MASTER AND SLAVE MODE OPERATION
The WM8952 audio interface may be configured as either master or slave. As a master interface
device the WM8952 generates BCLK and FRAME and thus controls sequencing of the data transfer
on ADCDAT. To set the device to master mode register bit MS should be set high. In slave mode
(MS=0), the WM8952 responds with data to clocks it receives over the digital audio interfaces.
AUDIO DATA FORMATS
In Left Justified mode, the MSB is available on the first rising edge of BCLK following an FRAME
transition. The other bits up to the LSB are then transmitted in order. Depending on word length,
BCLK frequency and sample rate, there may be unused BCLK cycles before each FRAME transition.
Figure 19 Left Justified Audio Interface (assuming n-bit word length)
In Right Justified mode, the LSB is available on the last rising edge of BCLK before a FRAME
transition. All other bits are transmitted before (MSB first). Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles after each FRAME transition.
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Figure 20 Right Justified Audio Interface (assuming n-bit word length)
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S mode, the MSB is available on the second rising edge of BCLK following a FRAME transition.
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ADCDAT: ADC data output
FRAME: Data alignment clock
BCLK: Bit clock, for synchronisation
Left justified
Right justified
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DSP mode A / B
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PP, Rev 3.0, December 2008
WM8952
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