wm8952 Wolfson Microelectronics plc, wm8952 Datasheet - Page 10

no-image

wm8952

Manufacturer Part Number
wm8952
Description
Mono Adc With Microphone Pre-amplifier
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM8952
w
SIGNAL TIMING REQUIREMENTS
SYSTEM CLOCK TIMING
Figure 1 System Clock Timing Requirements
Note 1:
PLL pre-scaling and PLL N and K values should be set appropriately so that SYSCLK is no greater than 12.288MHz.
AUDIO INTERFACE TIMING – MASTER MODE
Test Conditions
DVDD=1.8V, AVDD=3.3V, DGND=AGND=0V, T
PARAMETER
System Clock Timing Information
MCLK cycle time
MCLK duty cycle
MCLK
Figure 2 Digital Audio Data Timing – Master Mode (see Control Interface)
T
SYMBOL
T
MCLKDS
MCLKY
t
MCLKL
A
t
MCLKY
= +25
MCLK=SYSCLK (=256fs)
t
MCLK input to PLL
MCLKH
o
C
CONDITIONS
Note 1
81.38
60:40
20
MIN
TYP
PP, Rev 3.0, December 2008
40:60
MAX
Pre Production
UNIT
ns
ns
10

Related parts for wm8952