ICS9112 Integrated Circuit System, ICS9112 Datasheet
ICS9112
Available stocks
Related parts for ICS9112
ICS9112 Summary of contents
Page 1
... PLL. Since the skew between the input and output is less than +/- 350 pS, the part acts as a zero delay buffer. The ICS9112-16 comes in an eight pin 150 mil SOIC or 173 mil TSSOP package. It has five output clocks. In the absence of REF input, will be in the power down mode. In this mode, the PLL is turned off and the output buffers are pulled low ...
Page 2
... ICS9112-16 Pin Descriptions Notes: 1. Guaranteed by design and characterization. Not subject to 100% test. ...
Page 3
... ICS9112-16 +0 ...
Page 4
... ICS9112-16 Switching Characteristics ...
Page 5
... REF input and CLK(1-4) outputs loaded equally, with CLKOUT loaded More. Timing diagrams with different loading configurations REF input and all outputs loaded Equally REF input and CLK(1_4) outputs loaded equally, with CLKOUT loaded Less. 5 ICS9112-16 ...
Page 6
... ICS9112-16 N INDEX INDEX AREA AREA 45° 45° Ordering Information ICS9112yM-16-T Example: ICS XXXX PPP - T C SYMBOL COMMON DIMENSIONS COMMON DIMENSIONS VARIATIONS N SEATING SEATING PLANE PLANE 8 Reference Doc.: JEDEC Publication 95, MS-012 ...
Page 7
... Pattern Number ( digit number for parts with ROM code patterns) Package Type G=TSSOP Revision Designator (will not correlate with datasheet revision) Device Type (consists digit numbers) Prefix ICS Standard Device 7 ICS9112-16 In Millimeters In Inches COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX MIN -- 1 ...