mc9s12xs128 Freescale Semiconductor, Inc, mc9s12xs128 Datasheet - Page 228
mc9s12xs128
Manufacturer Part Number
mc9s12xs128
Description
Hcs12 Microcontrollers 16-bit Automotive Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12XS128.pdf
(738 pages)
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S12X Debug (S12XDBGV3) Module
BDM cannot be entered from a breakpoint unless the ENABLE bit is set in the BDM. If entry to BDM via
a BGND instruction is attempted and the ENABLE bit in the BDM is cleared, the CPU12X actually
executes the BDM firmware code. It checks the ENABLE and returns if ENABLE is not set. If not serviced
by the monitor then the breakpoint is re-asserted when the BDM returns to normal CPU12X flow.
If the comparator register contents coincide with the SWI/BDM vector address then an SWI in user code
and DBG breakpoint could occur simultaneously. The CPU12X ensures that BDM requests have a higher
priority than SWI requests. Returning from the BDM/SWI service routine care must be taken to avoid re
triggering a breakpoint.
228
When program control returns from a tagged breakpoint using an RTI or
BDM GO command without program counter modification it will return to
the instruction whose tag generated the breakpoint. To avoid re triggering a
breakpoint at the same location reconfigure the S12XDBG module in the
SWI routine, if configured for an SWI breakpoint, or over the BDM
interface by executing a TRACE command before the GO to increment the
program flow past the tagged instruction.
1
1
1
Table 6-44. Breakpoint Mapping Summary
S12XS Family Reference Manual, Rev. 1.10
1
1
1
NOTE
0
1
1
X
0
1
Breakpoint to BDM
Breakpoint to SWI
No Breakpoint
Freescale Semiconductor
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