W83627F Information Storage Devices, Inc, W83627F Datasheet - Page 98
W83627F
Manufacturer Part Number
W83627F
Description
LPC Interface I/o Plus Kbc, Game Port, Midi Port
Manufacturer
Information Storage Devices, Inc
Datasheet
1.W83627F.pdf
(118 pages)
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W83627F-AW
Manufacturer:
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CRF1 (Default 0x00)
CRF3 (Default 0x00)
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6 - 5 : Devices' trap status.
Bit 4
Bit 3 - 0 : Devices' trap status.
Bit 7 - 6 : Reserved. Return zero when read.
Bit 5 - 0 : Device's IRQ status.
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
: FDCPME. FDC auto power management enable.
= 0disable the auto power management functions.
= 1enable the auto power management functions.
: URAPME. UART A auto power management enable.
= 0disable the auto power management functions.
= 1enable the auto power management functions.
: URBPME. UART B auto power management enable.
= 0disable the auto power management functions.
= 1enable the auto power management functions.
: WAK_STS. This bit is set when the chip is in the sleeping state and an enabled resume
event occurs. Upon setting this bit, the sleeping/working state machine will transition the
system to the working state. This bit is only set by hardware and is cleared by writing a 1
to this bit position or by the sleeping/working state machine automatically when the global
standby timer expires.
= 0
= 1
: Reserved. Return zero when read.
These bits indicate the IRQ status of the individual device respectively. The device's IRQ
status bit is set by their source device and is cleared by writing a 1. Writing a 0 has no
effect.
: MOUIRQSTS. MOUSE IRQ status.
: KBCIRQSTS. KBC IRQ status.
: PRTIRQSTS. printer port IRQ status.
: FDCIRQSTS. FDC IRQ status.
: URAIRQSTS. UART A IRQ status.
: URBIRQSTS. UART B IRQ status.
the chip is in the sleeping state.
the chip is in the working state.
- 94 -
Publication Release Date:November 2002
W83627HF/F
Revision 2.0
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