tmp86c408idmg TOSHIBA Semiconductor CORPORATION, tmp86c408idmg Datasheet - Page 109
tmp86c408idmg
Manufacturer Part Number
tmp86c408idmg
Description
Cmos 8-bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP86C408IDMG.pdf
(152 pages)
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Example :After checking low-frequency clock oscillation stability with TC4 and 3, switching to the SLOW1 mode
9.3.9 Warm-Up Counter Mode
9.3.9.1
switched between the high-frequency and low-frequency. The timer counter 3 and 4 are cascadable to form a
16-bit TimerCounter. The warm-up counter mode has two types of mode; switching from the high-frequency to
low-frequency, and vice-versa.
Table 9-8 Setting Time of Low-Frequency Warm-Up Counter Mode (fs = 32.768 kHz)
In this mode, the warm-up period time is obtained to assure oscillation stability when the system clocking is
Note 1: In the warm-up counter mode, fix TCiCR<TFFi> to 0. If not fixed, the
Note 2: In the warm-up counter mode, only upper 8 bits of the timer register TTREG4 and 3 are used for match
Note 3: i = 3, 4
PINTTC4:
VINTTC4:
is obtained. Before starting the timer, set SYSCR2<XTEN> to 1 to oscillate the low-frequency clock.
When a match between the up-counter and the timer register (TTREG4, 3) value is detected after the timer
is started by setting TC4CR<TC4S> to 1, the counter is cleared by generating the INTTC4 interrupt
request. After stopping the timer in the INTTC4 interrupt service routine, set SYSCR2<SYSCK> to 1 to
switch the system clock from the high-frequency to low-frequency, and then clear of SYSCR2<XEN> to
0 to stop the high-frequency clock.
(NORMAL1 → NORMAL2 → SLOW2 → SLOW1)
Low-Frequency Warm-up Counter Mode
In this mode, the warm-up period time from a stop of the low-frequency clock fs to oscillation stability
pulses.
detection and lower 8 bits are not used.
Minimum Time Setting
SET
LD
LD
LD
DI
SET
EI
SET
CLR
SET
CLR
RETI
DW
(TTREG4, 3 = 0100H)
:
:
7.81 ms
(SYSCR2).6
(TC3CR), 43H
(TC4CR), 05H
(TTREG3), 8000H
(EIRH). 3
(TC4CR).3
(TC4CR).3
(SYSCR2).5
(SYSCR2).7
PINTTC4
:
:
Page 99
: SYSCR2<XTEN>
: Sets TFF3=0, source clock fs, and 16-bit mode.
: Sets TFF4=0, and warm-up counter mode.
: Sets the warm-up time.
: IMF
: Enables the INTTC4.
: IMF
: Starts TC4 and 3.
: Stops TC4 and 3.
: SYSCR2<SYSCK>
: SYSCR2<XEN>
: INTTC4 vector table
(Switches the system clock to the low-frequency clock.)
(The warm-up time depends on the oscillator characteristic.)
←
←
0
1
←
←
Maximum Time Setting
(TTREG4, 3 = FF00H)
←
0 (Stops the high-frequency clock.)
1
1
PDOi
1.99 s
,
PWMi
and
PPGi
pins may output
TMP86C408IDMG
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