at29lv256 ATMEL Corporation, at29lv256 Datasheet - Page 4
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at29lv256
Manufacturer Part Number
at29lv256
Description
At29lv256 256k 32k X 8 , 3-volt Read And 3-volt Write Flash
Manufacturer
ATMEL Corporation
Datasheet
1.AT29LV256.pdf
(16 pages)
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4.3
4.4
4.5
4
Hardware Data Protection
Input Levels
Product Identification
AT29LV256
After the software data protection’s 3-byte command code is given, a byte load is performed
by applying a low pulse on the WE or CE input with CE or WE low (respectively) and OE high.
The address is latched on the falling edge of CE or WE, whichever occurs last. The data is
latched by the first rising edge of CE or WE.
The 64 bytes of data must be loaded into each sector. Any byte that is not loaded during the
programming of its sector will be erased to read FFh. Once the bytes of a sector are loaded
into the device, they are simultaneously programmed during the internal programming period.
After the first data byte has been loaded into the device, successive bytes are entered in the
same manner. Each new byte to be programmed must have its high-to-low transition on WE
(or CE) within 150 µs of the low-to-high transition of WE (or CE) of the preceding byte. If a
high-to-low transition is not detected within 150 µs of the last low-to-high transition, the load
period will end and the internal programming period will start. A6 to A14 specify the sector
address. The sector address must be valid during each high-to-low transition of WE (or CE).
A0 to A5 specify the byte address within the sector. The bytes may be loaded in any order;
sequential loading is not required. Once a programming operation has been initiated, and for
the duration of t
Hardware features protect against inadvertent programs to the AT29LV256 in the following
ways: (a) V
power on delay – once V
out 10 ms (typical) before programming; (c) Program inhibit – holding any one of OE low, CE
high or WE high inhibits program cycles; and (d) Noise filter – pulses of less than 15 ns (typi-
cal) on the WE or CE inputs will not initiate a program cycle.
While operating with a 3.3V ±10% power supply, the address inputs and control inputs (OE,
CE and WE) may be driven from 0 to 5.5V without adversely affecting the operation of the
device. The I/O lines can only be driven from 0 to 3.6 volts.
The product identification mode identifies the device and manufacturer as Atmel
accessed by hardware or software operation. The hardware operation mode can be used by
an external programmer to identify the correct programming algorithm for the Atmel product. In
addition, users may wish to use the software product identification mode to identify the part
(i.e. using the device code), and have the system software use the appropriate sector size for
program operations. In this manner, the user can have a common board design for 256K to 4-
megabit densities and, with each density’s sector size in a memory map, have the system soft-
ware apply the appropriate sector size.
For details, see Operating Modes (for hardware operation) or Software Product Identification.
The manufacturer and device code is the same for both modes.
CC
sense – if V
WC
, a read operation will effectively be a polling operation.
CC
CC
has reached the V
is below 1.8V (typical), the program function is inhibited; (b) V
CC
sense level, the device will automatically time
0563E–FLASH–2/07
®
. It may be
CC