is42s16160a-6tl Integrated Silicon Solution, Inc., is42s16160a-6tl Datasheet - Page 18
is42s16160a-6tl
Manufacturer Part Number
is42s16160a-6tl
Description
256 Mb Synchronous Dram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
1.IS42S16160A-6TL.pdf
(49 pages)
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IS42S83200A
IS42S16160A
18
[ Read Interrupted by Write ]
Burst read operation can be interrupted by write of any bank. Random column access is allowed. In this case, the
DQ should be controlled adequately by using the DQM to prevent the bus contention. The output is disabled
automatically 2 cycle after WRITE assertion.
BURST INTERRUPTION
[ Read Interrupted by Read ]
Burst read operation can be interrupted by new read of any bank. Random column access is allowed
READ to READ interval is minimum 1 CLK..
A0-9,11-12
A0-9,11-12
Command
Command
BA0-1
BA0-1
DQM
CLK
A10
CLK
A10
DQ
DQ
(4-bank x 8,388,608 - word x 8-bit)
(4-bank x 4,194,304 - word x 16-bit)
ACT
Xa
Xa
00
READ
Ya
00
0
Read interrupted by Read (CL=2, BL=4)
Read interrupted by Write (CL=2, BL=4)
READ
Ya
00
0
Qa0
READ
Qa1
Qa0
00
Yb
Output disable by DQM
0
READ
Qa2
Yc
10
0
Write
Qb0
Da0
Integrated Silicon Solution, Inc. — 1-800-379-4774
Ya
00
0
Da1
Qc0
by WRITE
Qc1
Da2
Da3
Qc2
Qc3
ISSI
11/01/05
Rev. D
®
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