74abt16899 NXP Semiconductors, 74abt16899 Datasheet - Page 3
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74abt16899
Manufacturer Part Number
74abt16899
Description
18-bit Latched Transceiver With 16-bit Parity Generator/checker 3-state
Manufacturer
NXP Semiconductors
Datasheet
1.74ABT16899.pdf
(16 pages)
Philips Semiconductors
PIN CONFIGURATION
PIN DESCRIPTION
1998 Feb 25
18-bit latched transceiver with 16-bit
parity generator/checker (3-State)
1ERRA, 1ERRB
2ERRA, 2ERRB
ODD/EVEN
OEA, OEB
1A0 - 1A7
2A0 - 2A7
1B0 - 1B7
2B0 - 2B7
SYMBOL
LEA, LEB
1APAR
2APAR
1BPAR
2BPAR
GND
SEL
V
ODD/EVEN
CC
1ERRA
2ERRA
1APAR
2APAR
GND
OEA
GND
GND
1A6
LEB
V
V
2A4
2A1
2A0
1A0
1A1
1A2
1A3
1A4
1A5
1A7
2A7
2A6
2A5
2A3
2A2
CC
CC
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
11
1
2
3
4
5
6
7
8
9
SH00082
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
27, 25, 24, 23, 22, 20, 19, 18
54, 52, 51, 50, 49, 47, 46, 45
30, 32, 33, 34, 35, 37, 38, 39
SEL
LEA
1B0
GND
1B1
1B2
1B3
1B4
V
1B5
1B6
1B7
1BPAR
1ERRB
GND
2ERRB
2BPAR
2B7
2B6
2B5
V
2B4
2B3
2B2
2B1
GND
2B0
OEB
CC
CC
3, 5, 6, 7, 8, 10, 11, 12
4, 15, 26, 31, 42, 53
9, 21, 36, 48
NUMBER
14, 43,
13, 17
44, 40
55, 28
16, 41
2, 29
PIN
56
1
3
Latched A bus 3-State inputs/outputs
Latched B bus 3-State inputs/outputs
A bus parity 3-State input
B bus parity 3-State input
Parity select input (Low for EVEN parity)
Output enable inputs (gate A to B,
B to A)
Mode select input (Low for generate)
Latch enable inputs (transparent High)
Error signal outputs (active-Low)
Ground (0V)
Positive supply voltage
NAME AND FUNCTION
74ABTH16899
74ABT16899
Product specification