mk50x256cmb100 Freescale Semiconductor, Inc, mk50x256cmb100 Datasheet - Page 40

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mk50x256cmb100

Manufacturer Part Number
mk50x256cmb100
Description
Arm Cortex-m4 Core With Dsp
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Peripheral operating requirements and behaviors
1. Typical values assume V
2. DC potential difference.
3. This resistance is external to MCU. The analog source resistance should be kept as low as possible in order to achieve the
4. In order to use the maximum ADC conversion clock frequency ADHSC bit should be set and the ADLPC should be clear.
5. In order to use the maximum ADC conversion clock frequency ADHSC bit should be set and the ADLPC should be clear.
6. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http://
7. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http://
40
Symbol
reference only and are not tested in production.
best results. The results in this datasheet were derived from a system which has <8 Ω analog source resistance. The R
C
cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1
cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1
C
C
AS
rate
rate
time constant should be kept to <1ns.
ADC conversion
rate
ADC conversion
rate
Description
Table 24. 16-bit ADC operating conditions (continued)
DDA
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
≤13
bit modes
No ADC hardware
averaging
Continuous
conversions enabled
Peripheral clock =
50MHz
16 bit modes
No ADC hardware
averaging
Continuous
conversions enabled
Peripheral clock =
50MHz
Conditions
= 3.0 V, Temp = 25°C, f
Preliminary
ADCK
18.484
37.037
Min.
= 1.0 MHz unless otherwise stated. Typical values are for
Typ.
1
818.330
361.402
Max.
Freescale Semiconductor, Inc.
Ksps
Ksps
Unit
Notes
6
7
AS
/

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