adg465 Analog Devices, Inc., adg465 Datasheet - Page 5

• Manufacturer Part Number: adg465
• Description: Single Channel Protector In An Sot-23 Package
• Manufacturer: Analog Devices, Inc.

REV. A
CIRCUIT INFORMATION
Figure 6 below shows a simplified schematic of a channel pro-
tector circuit. The circuit is comprised of four MOS transis-
tors—two NMOS and two PMOS. One of the PMOS devices
does not lie directly in the signal path, but is used to connect the
source of the second PMOS device to its backgate. This has the
effect of lowering the threshold voltage and increasing the
input signal range of the channel for normal operation. The
source and backgate of the NMOS devices are connected for the
same reason. During normal operation the channel protectors
have a resistance of 80
low power devices; even under fault conditions the supply cur-
rent is limited to sub-microampere levels. All transistors are
dielectrically isolated from each other using a trench isolation
method. This makes it impossible to latch up the channel pro-
tectors. For an explanation, see Trench Isolation section.
Overvoltage Protection
When a fault condition occurs on the input of a channel pro-
tector, the voltage on the input has exceeded some threshold
voltage set by the supply rail voltages. The threshold voltages
are related to the supply rails as follows: for a positive overvolt-
age, the threshold voltage is given by V
threshold voltage of the NMOS transistor (1.5 V typ). In the
case of a negative overvoltage the threshold voltage is given by
Figure 6. The Channel Protector Circuit
NMOS
V
DD
OVERVOLTAGE
(SATURATED)
OPERATION
typ. The channel protectors are very
Figure 8. Positive Overvoltage Operation on the Channel Protector
V
SS
V
SS
PMOS
PMOS
(+20V)
V
DD
T
V
N
= 1.5V
D
+
SPACE CHARGE
– V
NMOS
EFFECTIVE
V
REGION
DD
T
where V
V
P
G
–
(V
DD
TN
= +15V)
(V
is the
G
N-CHANNEL
– V
V
T
N
S
= 13.5V)
+
–5–
V
device (2 V typ). If the input voltage exceeds these threshold
voltages, the output of the channel protector (no load) is
clamped at these threshold voltages. However, the channel
protector output will clamp at a voltage inside these thresholds
if the output is loaded. For example, with an output load of
1 k , V
clamp at V
where V is due to I. R voltage drops across the channels of the
MOS devices (see Figure 8). As can be seen from Figure 8, the
current during fault condition is determined by the load on the
output (i.e., V
fault current is limited to the nanoampere level.
Figures 7, 9 and 10 show the operating conditions of the signal
path transistors during various fault conditions. Figure 7 shows
how the channel protectors operate when a positive overvoltage
is applied to the channel protector.
The first NMOS transistor goes into a saturated mode of opera-
tion as the voltage on its Drain exceeds the Gate voltage (V
the threshold voltage (V
The potential at the source of the NMOS device is equal to V
–V
operation.
OVERVOLTAGE
Figure 7. Positive Overvoltage on the Channel Protector
SS
N
TN
(+13.5V)
+
– V
. The other MOS devices are in a nonsaturated mode of
POSITIVE
TP
DD
(+20V)
*V
where V
= 15 V and a positive overvoltage. The output will
DD
TN
PMOS
NONSATURATED
= NMOS THRESHOLD VOLTAGE (+1.5V)
CLAMP
OPERATION
– V
V
DD
TN
TP
NMOS
V
(+15V)
/R
NMOS
is the threshold voltage of the PMOS
– V = 15 V – 1.5 V – 0.6 V = 12.9 V
SATURATED
L
). However, if the supplies are off, the
TN
I
OUT
). This situation is shown in Figure 8.
R
V
L
SS
PMOS
(–15V)
V
CLAMP
NON-
SATURATED
V
(+13.5V)
DD
– V
TN
*
ADG465
V
DD
NMOS
(+15V)
NON-
SATURATED
DD
DD
) –