sta014t STMicroelectronics, sta014t Datasheet - Page 31
sta014t
Manufacturer Part Number
sta014t
Description
Mpeg 2.5 Layer Iii Audio Decoder With Adpcm And Srs Wowo Postprocessing Capability
Manufacturer
STMicroelectronics
Datasheet
1.STA014T.pdf
(45 pages)
ANCILLARY DATA BUFFER
Address: 0x7E - 0xB5 (126 - 181)
Type: RO
Software Reset: 0x00
Hardware Reset: 0x00
The STA014 contains 56 consecutive 8-bit regis-
ters corresponding to the maximum number of
ancillary data that may be contained in MPEG
frame.
The ANCCOUNT_L and ANCOUNT_H registers
contain the number of ancillary data bits available
within the current MPEG frame.
To perform ancillary data reading a status regis-
ter (0xB6 - INTERRUPT_STATUS_REGISTER)
is available: bit 0 of this register should be polled
by the microcontroller in order to understand
when new data are available.
ISR
Address: 0xB6 (182)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
X = don’t care;
0 = no ancillary data
1 = Ancillary Data Available
The ISR is used by the microcontroller to under-
stand when a new ancillary data block is avail-
able. After all ancillary data has been retrieved
this bit must be cleared.
MSB
b7
X
0x7E
0xB5
0xB6
----
----
----
----
b6
X
b5
X
b4
X
ANC_DATA_56
ANC_DATA_1
b3
X
---------
---------
---------
---------
ISR
b2
X
b1
X
LSB
b0
0
1
ADPCM_CONFIG
Address: 0xB8 (184)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
This register controls ADPCM engine and how
data must be compressed.
The above bitrates refers to an 8 KHz 16 bits
mono input stream
GPSO_ENABLE
Address: 0xB9 (185)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
This register enable/disable the GPSO interface.
Setting the GEN bit will enable the serial interface
for ADPCM data retrieving. Reset GEN bit to dis-
able GPSO interface.
MSB
ASM_EN: ADPCM Stereo Mode Enable
AA0,AA1: ADPCM Algorithm selection
AFM_EN
MSB
b7
X
b7
X
AA1
0
0
1
1
b6
X
b6
X
ADPCM Frame Mode Enable
0 =
1 =
0 =
1 =
The ADPCM encoding/decoding algorithm
can be selected according to the following
table:
b5
X
AA0
b5
X
0
1
0
1
STA014-STA014B-STA014T
b4
no frames (raw format)
select the framed output format for
ADPCM encoded data
Disable stereo mode
Enable stereo mode
X
b4
X
AA1 AA0 ASM_EN AFM_EN
b3
G723-24 algorithm (24kbp/s)
G723-40 algorithm (40kbp/s)
G721 algorithm (32kbp/s)
b3
X
b2
DVI algorithm
b2
X
b1
b1
X
LSB
b0
GEN
LSB
31/45
b0