lan9420 Standard Microsystems Corp., lan9420 Datasheet - Page 56

• Manufacturer Part Number: lan9420
• Description: Lan9420/lan9420i Single-chip Ethernet Controller With Hp Auto-mdix Support And Pci Interface
• Manufacturer: Standard Microsystems Corp.

Revision 1.1 (03-31-08)
3.5.3.1
3.5.3.2
3.5.3.3
MCPAS
X
0
0
0
0
1
1
Perfect Filtering
This filtering mode passes only incoming frames whose destination address field exactly matches the
value programmed into the MAC address high register (refer to
Register (ADDRH)," on page
Address Low Register (ADDRL)," on page
the above two registers in the MCSR.
Hash Only Filtering Mode
This type of filtering checks for incoming receive packets with either multicast or physical destination
addresses, and executes an imperfect address filtering against the hash table.
During imperfect hash filtering, the destination address in the incoming frame is passed through the
CRC logic and the upper six bits of the CRC register are used to index the contents of the hash table.
The hash table is formed by concatenating the register’s multicast hash table high (refer to
4.4.4, "Multicast Hash Table High Register (HASHH)," on page
to
64-bit hash table. The most significant bit of the CRC determines the register to be used (High/Low),
while the other five bits determine the bit within the register. A value of 00000 selects Bit 0 of the
multicast hash table low register and a value of 11111 selects Bit 31 of the multicast hash table high
register.
Hash Perfect Filtering
In hash perfect filtering, if the received frame is a physical address, the packet filter block perfect-filters
the incoming frame’s destination field with the value programmed into the MAC Address High register
(refer to
low register (refer to
incoming frame is a multicast frame, however, the packet filter function performs an imperfect address
filtering against the hash table.
The imperfect filtering against the hash table is the same imperfect filtering process described in
Section
Section 4.4.5, "Multicast Hash Table Low Register (HASHL)," on page
PRMS
3.5.3.2.
0
0
0
0
1
0
0
Section 4.4.2, "MAC Address High Register (ADDRH)," on page
INVFILT
Section 4.4.3, "MAC Address Low Register (ADDRL)," on page
0
0
0
1
0
0
0
Table 3.13 Address Filtering Modes
124) and the MAC address low register (refer to
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
DATASHEET
HFILT
0
0
1
0
X
0
1
56
125). The MAC address is formed by the concatenation of
HPFILT
0
1
1
0
X
X
1
126) and multicast hash table low (refer
MAC address perfect filtering only
for all addresses.
MAC address perfect filtering for
physical address and hash filtering
for multicast addresses
Hash Filtering for physical and
multicast addresses
Inverse Filtering
Promiscuous
Pass all multicast frames. Frames
with physical addresses are
perfect-filtered
Pass all multicast frames. Frames
with physical addresses are hash-
filtered
Section 4.4.2, "MAC Address High
127) in the MCSR to form a
124) and the MAC address
DESCRIPTION
SMSC LAN9420/LAN9420i
Section 4.4.3, "MAC
125). If the
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