lan9420 Standard Microsystems Corp., lan9420 Datasheet - Page 116
lan9420
Manufacturer Part Number
lan9420
Description
Lan9420/lan9420i Single-chip Ethernet Controller With Hp Auto-mdix Support And Pci Interface
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN9420.pdf
(169 pages)
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Revision 1.1 (03-31-08)
4.3.9
31:29
27:17
BITS
15:0
28
16
RESERVED
MIL RX FIFO Full Counter Overflow (MIL_OVER)
Overflow bit for the MIL_FIFO_FULL counter. This bit is automatically
cleared on a read.
MIL RX FIFO Full Counter (MIL_FIFO_FULL)
This field indicates the number of frames missed due a MIL RX FIFO full
condition. This counter is automatically cleared on a read.
RX Buffer Unavailable Counter Overflow (UNAV_OVER)
Overflow bit for the RX_BUFF_UNAV counter. This bit is automatically
cleared on a read.
RX Buffer Unavailable Counter (RX_BUFF_UNAV)
This field indicates the number of frames missed due to receive buffers
being unavailable. This counter is incremented each time the DMAC
discards an incoming frame. This counter is automatically cleared on a
read.
Missed Frame and Buffer Overflow Counter Reg (MISS_FRAME_CNTR)
The DMAC maintains two counters to track the number of missed frames during a receive operation.
The MISS_FRAME_CNTR register reports the current value of these counters and their overflow bits.
Offset:
DESCRIPTION
0020h
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
DATASHEET
116
Size:
32 bits
TYPE
SMSC LAN9420/LAN9420i
RO
RC
RC
RC
RC
DEFAULT
0000h
000h
Datasheet
0b
0b
-
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