s1r72801 Epson Electronics America, Inc., s1r72801 Datasheet - Page 30
s1r72801
Manufacturer Part Number
s1r72801
Description
Ieee1394 Controller S1r72801f00a
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1R72801.pdf
(113 pages)
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S1R72801F00A
8.1.3 Register Map
(The base address of this register is 0x100000.)
26
Address Register Name
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
MainIntStat
SubIntStat
UltraDmaMode
(Reserved)
DmaIntStat
LinkIntStat1
LinkIntStat0
PhyIntStat
(Reserved)
7:SubIntStat
6: TxIsoCmp
5: RxDmaCmp
4: TxAsyCmp
3: HwSBP2Cmp
2: IDE_DmaCmp
1: IDE_INTRQ
0: BusReset
7: SelfIDdone
6: SelfIDerr
5: HwSBP2Err
4: HwSBP2BRst
3: LinkIntStat1
2: LinkIntStat0
1: PhyIntStat
0: DmaIntStat
7:
6:
5:
4:
3:
2:
1:
0:
7:
6: TxAsyRtyGo
5: TxAsyBCSent
4: RxDmaFaild
3: TxAsyFaild
2: TxIsoFaild
1: TxAsyBRAbort R(W)
0: TxAsyMiss
7:
6:
5:
4:
3: RxOnTardy
2: RxHcrcErr
1: RxUnkTcode
0: TxRtyExced
7: UnExpCh
6: DupliCh
5: IsoArbFaild
4: CycTooLong
3: CycOverFlw
2: CycEvent
1: CycLost
0: CycArbFail
7: SubGap
6: ArbGap
5:
4:
3:
2: Phy_int
1: PhyWrDone
0: PhyRdDone
7:
6:
5:
4:
3:
2:
1:
0:
Bit Symbol
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R(W)
R/W
EPSON
0: None 1: Sub Interrupt Occurred
0: None 1: ISO Pkt Transmit Done
0: None 1: Packet Reception
0: None 1: AckCode Reception
0: None 1: HwSBP2 Process Complete
0: None 1: IDE DMA Transmit Complete
0: None 1: IDE Interface Interrupt
0: None 1: Bas Reset Detected
0: None 1: Self-ID Phase Done
0: None 1: Self-ID Packet Error
0: None 1: Hw SBP2 Error
0: None 1: BusReset in process HwSBP
0: None 1: Link1 Interrupt Occurred
0: None 1: Link0 Interrupt Occurred
0: None 1: PHY Interrupt Occurred
0: None 1: Dma Interrupt Occurred
0:
0:
0:
0:
0:
0:
0:
0:
0:
0: None 1: Async Tx Retry Go
0: None 1: AsyncTxBroadcast Sent
0: None 1: Rx DMA Failed
0: None 1: Async Tx Failed
0: None 1: ISO Tx Failed
0: None 1: Async Tx BusReset Abort
0: None 1: AsyncTxAckCodeMissing
0:
0:
0:
0: None 1: Ack_tardy Sent
0: None 1: Rx Packet Header CRC Err
0: None 1: Rx Packet Tcode Unknown
0: None 1: Tx Retry Exceeded
0: None 1: Unknown Expected Channel
0: None 1: DuplicateChannelDetected
0: None 1: Iso Arbtration Failed
0: None 1: ISO Arbitration Failed
0: None 1: Cycle Timer Over Fullow
0: None 1: Local Cycle Event Occured
0: None 1: Cycle Start Packet Lost
0: None 1: CycleStartPkt Arbtration Fail
0: None 1: Sub Action Gap Detected
0: None 1: ArbtrationResetGapDetected
0:
0:
0:
0: None 1: PHY Interrupt Detected
0: None 1: PHY Register Write Done
0: None 1: PHY Register Read Done
0:
0:
0:
0:
0:
0:
0:
0:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
1:
Description
H.Rst S.Rst B.Rst
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
–
–
–
–
–
–
–
–
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