at75c220 ATMEL Corporation, at75c220 Datasheet - Page 39
at75c220
Manufacturer Part Number
at75c220
Description
Smart Internet Appliance Processor Siap
Manufacturer
ATMEL Corporation
Datasheet
1.AT75C220.pdf
(144 pages)
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•
•
•
•
MAC Network Status Register
Register Name: ETH_SR
Access Type: Read-only
Reset Value: 0x4
•
•
•
BIG
EAE
CLK
RTY
LINK
MDIO
IDLE
Receive 1522 bytes. When set, the MAC will receive up to 1522 bytes. Normally the MAC will receive frames up to
1518 bytes in length.
External address match enable. Optional.
The system clock (HCLK) is divided down to generate MDC (the clock for the MDIO). For conformance with IEEE 802.3
MDC must not exceed 2.5 MHz. At reset this field is set to 10 so that HCLK is divided by 32.
Retry test. When set, the time between frames will always be one time slot. For test purposes only. Must be cleared for
normal operation.
The status of the LINK pin. Optional.
Returns status of the MDIO pin.
The PHY management logic is idle (i.e., has completed).
31
23
15
CLK
–
–
–
7
–
00
01
10
11
30
22
14
–
–
–
6
–
HCLK divided by 16
HCLK divided by 32
HCLK divided by 64
HCLK divided by 8
MDC
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
IDLE
26
18
10
–
–
–
2
MDIO
25
17
–
–
9
–
1
LINK
24
16
–
–
8
–
0
39
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