mc68hc05pv8a Freescale Semiconductor, Inc, mc68hc05pv8a Datasheet - Page 167

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mc68hc05pv8a

Manufacturer Part Number
mc68hc05pv8a
Description
Mc68hc05pv8a Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MC68HC(8)05PV8/A — Rev. 1.9
CME – Clock Monitor Enable
STOPR – STOP Reset
HTRE – High Temperature Reset Enable
HVRE – High Voltage Reset Enable
The CME bit enables a watchdog for the oscillator circuit. When the
frequency drops below a threshold (due to a brown-out or a defective
element), when enabled, the clock monitor will reset the MCU and
switch to an internal RC oscillator.
When enabled, the MCU will be reset when a STOP instruction is to
be executed.
The HTRE bit allows the high temperature reset to be enabled. If the
HTRE bit is in erased state (logic 0), the HTR is disabled.
Programming this bit (logic 1) enables the HTR. Changes to this bit
do not take effect until the next power-on or external reset occurs. See
Section 5. Resets
The HVRE bit allows the high voltage reset to be enabled. If the HVRE
bit is in erased state (logic 0), the HVR is disabled. Programming this
bit (logic 1) enables the HVR. Changes to this bit do not take effect
until the next power-on or external reset occurs. See
Resets
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Clock monitor enabled
0 = Clock monitor disabled
1 = STOP instruction causes reset
0 = STOP instruction executes normally
1 = HTR enabled
0 = HTR disabled
1 = HVR enabled
0 = HVR disabled
for details.
Go to: www.freescale.com
Program EEPROM
for details.
Program EEPROM
Section 5.
Options Register
Technical Data

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