mc68hc908lj24 Freescale Semiconductor, Inc, mc68hc908lj24 Datasheet - Page 279

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mc68hc908lj24

Manufacturer Part Number
mc68hc908lj24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
BYTE 1
BYTE 1
READ SCDR
READ SCS1
Infrared Serial Communications Interface Module (IRSCI)
PE — Receiver Parity Error Bit
SCRF = 1
This clearable, read-only bit is set when the SCI detects a parity error
in incoming data. PE generates an SCI error CPU interrupt request if
the PEIE bit in SCC3 is also set. Clear the PE bit by reading SCS1
with PE set and then reading the SCDR. Reset clears the PE bit.
BYTE 1
OR = 0
Figure 13-16. Flag Clearing Sequence
1 = Parity error detected
0 = No parity error detected
READ SCDR
READ SCS1
DELAYED FLAG CLEARING SEQUENCE
NORMAL FLAG CLEARING SEQUENCE
BYTE 2
BYTE 2
SCRF = 1
BYTE 1
OR = 0
READ SCDR
READ SCS1
SCRF = 1
BYTE 2
OR = 0
Infrared Serial Communications Interface Module (IRSCI)
BYTE 3
BYTE 3
READ SCDR
READ SCDR
READ SCS1
READ SCS1
SCRF = 1
SCRF = 1
BYTE 3
BYTE 3
OR = 1
OR = 0
BYTE 4
BYTE 4
I/O Registers
Data Sheet
279

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