mc68hc908lj24 Freescale Semiconductor, Inc, mc68hc908lj24 Datasheet - Page 158
mc68hc908lj24
Manufacturer Part Number
mc68hc908lj24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908LJ24.pdf
(464 pages)
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System Integration Module (SIM)
9.7.2 Stop Mode
Data Sheet
158
NOTE:
In stop mode, the SIM counter is reset and the system clocks are
disabled. An interrupt request from a module can cause an exit from stop
mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
The SIM disables the clock generator module output (CGMOUT) in stop
mode, stopping the CPU and peripherals. Stop recovery time is
selectable using the SSREC bit in the configuration register 1
(CONFIG1). If SSREC is set, stop recovery is reduced from the normal
delay of 4096 ICLK cycles down to 32. This is ideal for applications using
canned oscillators that do not require long start-up times from stop
mode.
External crystal applications should use the full stop recovery time by
clearing the SSREC bit.
EXITSTOPWAIT
NOTE: EXITSTOPWAIT = RST pin OR CPU interrupt OR break interrupt
ICLK
RST
IDB
IAB
IAB
IDB
Figure 9-16. Wait Recovery from Interrupt or Break
$A6
System Integration Module (SIM)
Figure 9-17. Wait Recovery from Internal Reset
$A6
$6E0B
$A6
$6E0B
$A6
$A6
$A6
CYCLES
32
$6E0C
$01
CYCLES
$00FF
32
$0B
MC68HC908LJ24/LK24 — Rev. 2.1
$00FE
$6E
RST VCT H RST VCT L
Freescale Semiconductor
$00FD
$00FC
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