ep2a40b724i8 Altera Corporation, ep2a40b724i8 Datasheet - Page 57
ep2a40b724i8
Manufacturer Part Number
ep2a40b724i8
Description
Programmable Logic Device Family
Manufacturer
Altera Corporation
Datasheet
1.EP2A40B724I8.pdf
(99 pages)
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Figure 34. Multi-Bit CDS Supports N:1 Topology
When using multi-bit CDS, the J and W factors do not need to be the same
value. The byte boundary cannot be distinguished with multi-bit CDS
patterns (see
logic.
Either pattern can be used.
Pre-Programmed CDS
When the fixed clock-to-data skew is known, CDS can be pre-
programmed into the device during configuration. If CDS is pre-
programmed into the device, the training patterns do not need to be
transmitted to the receiver channels. The resolution of each pre-
programmed setting is 25% of the data period, to compensate for skew up
to ±50% of the data period.
Table 12. Multi-Bit CDS Patterns
1, 2, 4 to 10
1, 2, 4 to 10
W Factor
Table 12
APEX II
Device
Clock
Table
shows the possible training patterns for multi-bit CDS.
12). Therefore, the byte must be aligned using internal
APEX II Programmable Logic Device Family Data Sheet
Clock
Data
J Factor
4 to 10
4 to 10
APEX II
APEX II
Device
Device
Clock
3
3
Data
Multi-Bit CDS Pattern
J-bits of 010101 pattern
J-bits of 101010 pattern
APEX II
Device
Clock
57
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