adsp-21160n Analog Devices, Inc., adsp-21160n Datasheet - Page 39

• Manufacturer Part Number: adsp-21160n
• Description: Dsp Microcomputer
• Manufacturer: Analog Devices, Inc.

JTAG Test Access Port and Emulation
For JTAG Test Access Port and Emulation, see
Figure
Table 28. JTAG Test Access Port and Emulation
1
2
REV. 0
Parameter
Timing Requirements
t
t
t
t
t
t
Switching Characteristics
t
t
System Inputs = DATA63–0, ADDR31–0, RDx, WRx, ACK, SBTS, HBR, HBG, CS, DMAR1, DMAR2, BR6–1, ID2–0, RPBA, IRQ2–0, FLAG3–0,
System Outputs = DATA63–0, ADDR31–0, MS3–0, RDx, WRx, ACK, PAGE, CLKOUT, HBG, REDY, DMAG1, DMAG2, BR6–1, PA, BRST, CIF,
TCK
STAP
HTAP
SSYS
HSYS
TRSTW
DTDO
DSYS
PA, BRST, DR0, DR1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, LxDAT7–0, LxCLK, LxACK, EBOOT, LBOOT, BMS,
CLKIN, RESET.
FLAG3–0, TIMEXP, DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, LxDAT7–0, LxCLK, LxACK, BMS.
26.
TCK Period
TDI, TMS Setup Before TCK High
TDI, TMS Hold After TCK High
System Inputs Setup Before TCK Low
System Inputs Hold After TCK Low
TRST Pulsewidth
TDO Delay from TCK Low
System Outputs Delay After TCK Low
TCK
TMS
TDI
TDO
SYSTEM
INPUTS
SYSTEM
OUTPUTS
Figure 26. JTAG Test Access Port and Emulation
t
DTDO
Table 28
t
TCK
t
t
DSYS
STAP
and
1
1
2
–39–
t
HTAP
t
SSYS
Min
t
5
6
7
18
4t
CK
CK
t
HSYS
ADSP-21160N
Max
13
30
Unit
ns
ns
ns
ns
ns
ns
ns
ns