pca8575 NXP Semiconductors, pca8575 Datasheet - Page 12
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
pca8575
Manufacturer Part Number
pca8575
Description
Remote 16-bit I/o Expander For I2c-bus With Interrupt
Manufacturer
NXP Semiconductors
Datasheet
1.PCA8575.pdf
(30 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
pca8575BQ
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
pca8575BS
Manufacturer:
NXP
Quantity:
585
Part Number:
pca8575BS
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
pca8575D
Manufacturer:
NXP Semiconductors
Quantity:
1 803
Company:
Part Number:
pca8575D
Manufacturer:
NXP
Quantity:
2 233
Part Number:
pca8575D
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
pca8575DB
Manufacturer:
NXP
Quantity:
398
Part Number:
pca8575DB
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
9. Characteristics of the I
PCA8575_2
Product data sheet
9.1.1 START and STOP conditions
9.1 Bit transfer
9.2 System configuration
The I
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see
Fig 15. Bit transfer
Fig 16. Definition of START and STOP conditions
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
SDA
SCL
START condition
2
SDA
SCL
Figure
C-bus
S
Rev. 02 — 21 March 2007
16.)
Figure
Remote 16-bit I/O expander for I
data valid
data line
stable;
17).
Figure
allowed
change
of data
15).
STOP condition
mba607
2
P
C-bus with interrupt
PCA8575
© NXP B.V. 2007. All rights reserved.
mba608
SDA
SCL
12 of 30