pll130-09 PhaseLink Corp., pll130-09 Datasheet - Page 2
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pll130-09
Manufacturer Part Number
pll130-09
Description
High Speed Translator Buffer To Lvds
Manufacturer
PhaseLink Corp.
Datasheet
1.PLL130-09.pdf
(5 pages)
PIN DESCRIPTIONS
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
to commercial grade only.
2. General Electrical Specifications
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 06/27/08 Page 2
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
Supply Current, No Load
Operating Voltage
Output Clock Duty Cycle
Short Circuit Current
LVDS_BAR
REF_IN
Name
LVDS
GND
VDD
OE
PARAMETERS
SOP-8L
1,3,7
N/A
5,8
2
4
6
Pin Number
PARAMETERS
9,13,14,15
7,10,11,12
QFN-16L
1,2,4,5,
16
3
6
8
SYMBOL
V
I
DD
DD
Type
O
O
P
P
I
I
Fout = 200MHz, LVDS
@ 1.25V (LVDS)
Ground.
Power supply.
Reference input signal. The frequency of this signal will be re-
produced at the output (after translation to LVDS level).
LVDS True output.
LVDS Complementary output.
Output enable (‘1’ for enable). Internal pull-up (default is ‘1’).
CONDITIONS
High Speed Translator Buffer to LVDS
*Operating temperature is guaranteed by design. Parts are tested
SYMBOL
V
V
T
T
T
V
DD
O
S
A
J
I
Description
MIN.
2.25
MIN.
-0.5
-0.5
-65
-40
±5% of input
TYP.
50
25
V
V
MAX.
DD
DD
150
125
260
4.6
85
2
+0.5
+0.5
MAX.
3.63
30
UNITS
C
C
C
C
kV
UNITS
V
V
V
mA
mA
%
V