pc87311a National Semiconductor Corporation, pc87311a Datasheet - Page 11

• Manufacturer Part Number: pc87311a
• Description: Pc87311a/pc87312 Superi/otm Ii/iii Floppy Disk Controller With Dual Uarts, Parallel Port, And Ide Interface
• Manufacturer: National Semiconductor Corporation

SOUT1 2
STB
STEP
TC
TRK0
VDDA
VDDB C
VSSA
VSSB-E
WR
WDATA
WGATE
WP
X1 OSC
X2
XTSEL
Symbol
1 0 Pin Description
Note XTSEL is an option for the PC87311A only
73 65
50 99
90 61
42 9
Pin
95
40
37
33
31
18
39
38
36
63
6
7
8
I O
O
O
O
O
O
O
I
I
I
I
I
I
Serial Output This output sends composite serial data to the communications link (peripheral device
MODEM or data set) The SOUT signal is set to a marking state (logic 1) after a Master Reset
operation (See BOUT and CFG0 – 4 for further information on these pins )
Data Strobe This output indicates to the printer that valid data is available at the printer port This pin
will be in a TRI-STATE condition 10 ns after a zero is loaded into the corresponding Control Register bit
The system should pull this pin high using a 4 7 kX resistor
Step This output signal issues pulses to the disk drive at a software programmable rate to move the
head during a seek operation
Terminal Count Control signal from the DMA controller to indicate the termination of a DMA transfer
TC is accepted only when DACK is active TC is active high in PC-AT and Model 30 modes and active
low in PS 2 mode
Track 0 This input indicates to the controller that the head of the selected floppy disk drive is at track
zero
Analog Supply This pin is the 5V supply for the analog data separator
Digital Supply This is the 5V supply voltage for the digital circuitry
Analog Ground This is the analog ground for the data separator
Digital Ground This is the ground for the digital circuitry
Write Active low input to signal a write from the microprocessor to the controller
Write Data This output is the write precompensated serial data that is written to the selected floppy
disk drive Precompensation is software selectable
Write Gate This output signal enables the write circuitry of the selected disk drive WGATE has been
designed to prevent glitches during power up and power down This prevents writing to the disk when
power is cycled
Write Protect This input indicates that the disk in the selected drive is write protected
Crystal1 Clock One side of an external 24 MHz crystal is attached here If a crystal is not used a TTL
or CMOS compatible clock is connected to this pin
Crystal2 One side of an external 24 MHz crystal is attached here This pin is left unconnected if an
external clock is used
XT Select When this pin is high during reset the chip will operate in the XT mode When this pin is low
during reset the chip will operate in the AT mode An internal pull-down resistor of 40 kX is on this pin
Use a 10 kX resistor to pull this pin to the required level during reset
There are five differences between AT and XT mode One concerns hard disk operation and the other
four concern UART operation In AT mode the IDE hard drive chip selects (HCS0 HCS1) will be active
for addresses 1F0 – 7H and 3F6 7H respectively In XT mode the IDE chip select HCS0 responds to
addresses 320 – 3H and HCS1 is inactive The differences in UART operation are the function of LSR
bit (see Section 6 5 bit 6) the modem control outputs during loop back mode (see Section 6 8 bit 4) the
Scratch Pad Register (see Section 6 10) and the availability of edge (XT) or level (AT) sensitive UART
interrupts
(Continued)
11
Function