ics1893ck-40 Integrated Device Technology, ics1893ck-40 Datasheet - Page 109
ics1893ck-40
Manufacturer Part Number
ics1893ck-40
Description
3.3-v 10base-t/100base-tx Integrated Phyceiver
Manufacturer
Integrated Device Technology
Datasheet
1.ICS1893CK-40.pdf
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9.5.11 100M MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission)
ICS1893CK-40, Rev. C, 06/02/09
Table 9-18
half-duplex transmission. The time periods consist of timings of signals on the following pins:
•
•
•
Figure 9-12
Table 9-18. 100M MII Carrier Assertion/De-Assertion (Half-Duplex Transmission Only)
Figure 9-12. 100M MII Carrier Assertion/De-Assertion Timing Diagram
TXEN
TXCLK
CRS
Period
Time
TXEN
TXCLK
CRS
t1
t2
ICS1893CK-40 Data Sheet Rev. C - Release
TXEN Sampled Asserted to CRS Assert
TXEN De-Asserted to CRS De-Asserted
lists the significant time periods for the 100M MII carrier assertion/de-assertion during
shows the timing diagram for the time periods.
(Half-Duplex Transmission Only)
t1
Copyright © 2009, Integrated Device Technology, Inc.
Parameter
All rights reserved.
109
t2
Chapter 9 DC and AC Operating Conditions
Condi-
tions
Min.
0
0
Typ.
3
3
Max.
4
4
Bit times
Bit times
June 2009
Units
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