mma2602wr2 Freescale Semiconductor, Inc, mma2602wr2 Datasheet - Page 20
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mma2602wr2
Manufacturer Part Number
mma2602wr2
Description
Dsi Inertial Sensor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MMA2602WR2.pdf
(48 pages)
20
3.5
3.5.1
3.5.2
data stream at a nominal frequency of 1 MHz.
3.5.3
the signal processing flow within the DSP block is shown in
Table 7. Signal Chain Characteristics
MMA26xxWR
A
B
C
D
E
F
The device transducer is an overdamped mass-spring-damper system described by the following transfer function:
where:
ζ = Damping Ratio
ω
Reference
The sigma delta converter provides the interface between the g-cell and the DSP block. The output of the ΣΔ converter is a
A digital signal processing (DSP) block is used to perform signal filtering and compensation operations. A diagram illustrating
-------------------------------- -
D
ΔC = C
10-Bit Output Scaling
Sinc Filter
n
×
1 z D
Low Pass Filter
= Natural Frequency = 2∗Π∗f
DSP Sampling
Compensation
C
C
(
ΣΔ_OUT
Description
Interpolation
–
1 z 1 –
SINC Filter
TOP
BOT
Acceleration Signal Path
Transducer
ΣΔ Converter
Digital Signal Processing Block
–
–
g-cell
TOP
ΣΔ
A
Section 2.8
)
- C
3
BOT
B
Sample Time
a
V = ΔC x V
0
⋅
n
---------------------------------------------------------------------------- -
d
for transducer parameters.
(μs)
11
11
16
16
16
16
α
1
1
1
+
+
=
(
(
n
d
12
12
C
X
V
INT1
/ C
⋅
⋅
n
X
z 1 –
z 1 –
Data Width
INT1
)
)
(Bits)
+
+
Low Pass Filter
20
26
26
(
(
1
n
d
13
13
β
Figure 12. ΣΔ Converter Block Diagram
1
⋅
⋅
z 2 –
z 2 –
INTEGRATOR
Figure 13. Signal Chain Diagram
H s ( )
)
)
1 - z
Over Range
FIRST
⋅
n
---------------------------------------------------------------------------- -
d
z
21
21
-1
(Bits
+
+
-1
1
4
=
(
(
n
d
22
22
------------------------------------------------------
s
2
⋅
⋅
z 1 –
z 1 –
+
Figure
Signal Width
2 ξ ω n s
)
)
+
+
⋅ ⋅
α
(Bits)
(
(
2
n
d
12
12
10
10
10
1
23
23
ω n
13.
2
⋅
⋅
z 2 –
z 2 –
⋅
)
)
Signal Noise
+
C
ω n
(Bits)
β
Compensation
2
2
4
4
3
INTEGRATOR
V = ±2 × V
SECOND
1 - z
z
-1
Signal Margin
-1
(Bits)
D
9
9
REF
Output
Scaling
QUANTIZER
Reference
Typical Block
1-BIT
ADC
DAC
tion 3.5.3.2
E
Freescale Semiconductor
Latency
112/f
24/f
64/f
4/f
Interpolation
osc
osc
osc
osc
Sec-
ΣΔ_OUT
Section 3.5.3.1
Section 3.5.3.2
Section 3.5.3.3
Section 3.5.3.5
Section 3.5.3.5
Section 3.5.2
OUTPUT
Reference
F
Sensors