ltc1274csw-trpbf Linear Technology Corporation, ltc1274csw-trpbf Datasheet
ltc1274csw-trpbf
Related parts for ltc1274csw-trpbf
ltc1274csw-trpbf Summary of contents
Page 1
... The LTC1274 has a single-ended input and a 12-bit parallel data format. The LTC1277 offers a differential input and a 2-byte read format. The bipolar mode is formatted as 2’s complement for the LTC1274 and offset binary for the LTC1277. , LTC and LT are registered trademarks of Linear Technology Corporation ...
Page 2
... Storage Temperature Range ................ – 65°C to 150°C – 0. 0.3V DD Lead Temperature (Soldering, 10 sec)................. 300°C – 0.3V to 12V ORDER + PART NUMBER A IN – LTC1274CSW REF AGND LTC1274ISW REFRDY SLEEP NAP DGND 24-LEAD PLASTIC SO WIDE T With Internal Reference (Notes 5, 6) CONDITIONS (Note 7) (Note 8) ...
Page 3
LOG I PUT (Note 5) SYMBOL PARAMETER V Analog Input Range (Note 10 Analog Input Leakage Current IN C Analog Input Capacitance ACCURACY SYMBOL PARAMETER S/( ...
Page 4
LTC1274/LTC1277 U U DIGITAL I PUTS A D DIGITAL OUTPUTS SYMBOL PARAMETER I High-Z Output Leakage D11 to D0 High-Z Output Capacitance D11 to D0 Output Source Current SOURCE I Output Sink Current SINK W U ...
Page 5
CHARACTERISTICS SYMBOL PARAMETER t HBEN↓ to Low Byte Data Valid 16 t HBEN↑ to RD↓ Setup Time 17 t RD↑ to HBEN↓ Setup Time 18 ● The denotes specifications which apply over the full operating ...
Page 6
LTC1274/LTC1277 W U TYPICAL PERFORMANCE CHARACTERISTICS S/( Input Frequency and Amplitude 0dB – 20dB – 60dB 100kHz SAMPLE ...
Page 7
W U TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Temperature 3 100kHz SAMPLE 2.5 2.0 1.5 1.0 0 100 125 –55 – TEMPERATURE (°C) LT1274/77 • TPC11 Supply Current vs Supply Voltage 3.0 f ...
Page 8
LTC1274/LTC1277 CTIO S RD (Pin 20): Read Input. This enables the output drivers when CS is low. CS (Pin 21): The Chip Select input must be low for the ADC to recognize CONVST and RD ...
Page 9
W BLOCK DIAGRA REF 2.42V REF REFRDY AGND DGND INTERNAL CLOCK + A IN – REF 2.42V REF REFRDY AGND DGND INTERNAL CLOCK TEST CIRCUITS Load Circuits for Access Timing DBN DBN 3k ...
Page 10
LTC1274/LTC1277 DIAGRA Setup Timing NAP to CONVST Wake-Up Timing (LTC1277) NAP t 3 CONVST U U APPLICATIONS INFORMATION CONVERSION DETAILS The LTC1274/LTC1277 use a successive approximation ...
Page 11
U U APPLICATIONS INFORMATION using an FFT algorithm, the ADCs’ spectral content can be examined for frequencies outside the fundamental. Figures 2a and 2b show typical LTC1274 FFT plots. Signal-to-Noise Ratio The Signal-to-Noise plus Distortion Ratio [S/(N + D)] is ...
Page 12
LTC1274/LTC1277 U U APPLICATIONS INFORMATION quency is shown in Figure 4. The ADCs have good distor- tion performance up to the Nyquist frequency and beyond. Intermodulation Distortion If the ADC input signal consists of more than one spectral component, the ...
Page 13
PPLICATI S I FOR ATIO + – LTC1277 A /A Input Settling IN IN The input capacitor for the LTC1277 is switched onto the + A input during the sample phase. The voltage on the IN ...
Page 14
LTC1274/LTC1277 PPLICATI S I FOR ATIO Figure 8. For bipolar mode, a 0.1µF ceramic provides adequate bypassing for the V pin. The capacitors must SS be located as close to the pins as possible. The traces ...
Page 15
PPLICATI FOR ATIO DIGITAL INTERFACE The ADCs are designed to interface with microproces- sors as a memory mapped device. The CS and RD control inputs are common to all peripheral memory interfacing. A separate ...
Page 16
LTC1274/LTC1277 PPLICATI FOR ATIO adjusted before full-scale error. Bipolar offset error ad- justment is achieved by trimming the offset adjust while the input voltage is 0.5LSB below ground. This is done by applying an ...
Page 17
PPLICATI S I FOR ATIO The narrow logic pulse on CONVST ensures that CONVST doesn’t return high during the conversion (see Note 13 following the Timing Characteristics table). In Mode 2 (Figure 15 tied ...
Page 18
LTC1274/LTC1277 PPLICATI S I FOR ATIO HBEN (LTC1277 CONVST BUSY DATA (N – 1) LTC1274 DATA DB11 TO DB0 DATA (N – 1) DATA (N – 1) LTC1277 DATA ...
Page 19
... ADC is ready to do conversions. Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
Page 20
... REF ON OFF 0.598 – 0.614* (15.190 – 15.600 NOTE LT/GP 1195 10K • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 1995 ON LTC1274/77 • F18b 0.394 – 0.419 (10.007 – 10.643) ...