cs4239 Cirrus Logic, Inc., cs4239 Datasheet - Page 84

• Manufacturer Part Number: cs4239
• Description: Crystalclear? Ortable Isa Audio System Logic
• Manufacturer: Cirrus Logic, Inc.

DACK<A,B,C> - DMA Acknowledge, Inputs
IRQ <A:G>- Host Interrupt Pins, Outputs, 24 mA drive
RESDRV - Reset Drive, Input
Analog Inputs
MIC - Mic Input
LAUX1 - Left Auxiliary #1 Input
RAUX1 - Right Auxiliary #1 Input
LAUX2 - Left Auxiliary #2 Input
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The assertion of these active low signals indicate that the current DMA request is being
acknowledged and the part will respond by either latching the data present on the data bus
(write) or putting data on the bus (read). The DACK<A,B,C> inputs must be connected to 8-bit
DMA channel acknowledge lines only. The defaults on the ISA bus are DACKA = DACK0,
DACKB = DACK1, and DACKC = DACK3. The defaults can be changed by modifying the
Hardware Resource data.
These signals are used to notify the host of events which need servicing. They are connected to
specific interrupt lines on the ISA bus. The IRQ<A:G> are individually enabled as per
configuration data that is generated during a Plug and Play configuration sequence. The defaults
on the ISA bus are IRQA = INT5, IRQB = INT7, IRQC = INT9, IRQD = INT11,
IRQE = INT12, IRQF = INT15. IRQG is new to the CS4239 and defaults to unconnected for
compatibility reasons. For new designs, IRQG is typically connected to IRQ10. The defaults
can be changed by modifying the Hardware Configuration data loaded from the E
Places the part in lowest power consumption mode. All sections of the part are shut down and
consuming minimal power. The part is reset and in power down mode when this pin is logic
high. The falling edge also latches the state of MCLK and SCLK to determine the functionality
of dual mode pins, and SCL to determine the Address Port. This signal is typically connected to
the ISA bus signal RESDRV. RESDRV must be asserted whenever the part is powered up to
initialize the internal registers to a known state. This pin, when high, also drives the BRESET
pin low.
Microphone input centered around VREF. A programmable gain block provides volume control
and is located in X2 with mutes located in X2 and X3.
Nominally 1 V
programmable gain block provides volume control and is located in I2. Typically used for an
external Left line-level input.
Nominally 1 V
programmable gain block provides volume control and is located in I3. Typically used for an
external Right line-level input.
Nominally 1 V
programmable gain block provides volume control and is located in I4. Typically used for the
Left channel CDROM input.
RMS
RMS
RMS
max analog input for the Right AUX1 channel, centered around VREF. A
max analog input for the Left AUX1 channel, centered around VREF. A
max analog input for the Left AUX2 channel, centered around VREF. A
CrystalClear Portable ISA Audio System
TM
2
PROM.
CS4239
DS253PP2