cs4239 Cirrus Logic, Inc., cs4239 Datasheet - Page 49

• Manufacturer Part Number: cs4239
• Description: Crystalclear? Ortable Isa Audio System Logic
• Manufacturer: Cirrus Logic, Inc.

MIMR
Right Input Mixer Control (X5)
Default = x00xxxxx
RIS1-RIS0
Left FM Synthesis Mute (X6)
Default = exxxxxxx
LFMM
Right FM Synthesis Mute (X7)
Default = exxxxxxx
RFMM
DS253PP2
RFMM
LFMM
D7
D7
D7
rbc
D6
D6
res
res
RIS1
D6
D5
D5
rbc
rbc
RIS0
D5
Mono Input Mute to the Right Output
mixer. When set to 1, the MIN signal
to the right output mixer is muted.
The default state of this bit is set by
MIM in the Hardware Configuration
Data, Mono & DSP Port byte.
Right Input Mixer Summer Attenuator.
This attenuates the inputs to the
right input mixer to enable overload
protection when multiple input
sources are utilized.
00 - 0 dB
01 - -6 dB
10 - -12 dB
11 - -18 dB
Left FM mute. When set to 1, the
left internal FM input to DAC2 is
muted. The default state of this bit is
the inverse of IFM in the Hardware
Configuration Data, Global Configura-
tion byte.
Right FM mute. When set to 1, the
right internal FM input to DAC2 is
muted. The default state of this bit is
the inverse of IFM in the Hardware
Configuration Data, Global Configura-
tion byte.
D4
D4
rbc
rbc
D4
res
D3
D3
rbc
rbc
D3
res
D2
D2
rbc
rbc
D2
res
D1
D1
rbc
rbc
D1
res
D0
D0
D0
rbc
rbc
res
Left DSP Serial Port Mute (X8)
Default = exxxxxxx
LSPM
Right DSP Serial Port Mute (X9)
Default = exxxxxxx
RSPM
Reserved (X10)
Default = xxxxxxxx
rbc
DAC1 Mute and IFSE Enable (X11)
Default = 110xxxxx
IFSE
RD1IM
RSPM
LSPM
D7
LD1IM
rbc
D7
D7
D7
D6
res
D6
res
D6
res
CrystalClear Portable ISA Audio System
RD1IM
D6
D5
rbc
D5
rbc
D5
rbc
Left DSP Serial Port Mute. When set
to 1, the Left DSP Serial Port input
(SDIN) is muted. The default state of
this bit is the inverse of SPE in the
Hardware Configuration Data, Mono
& DSP Port byte.
set to 1, the Right DSP Serial Port
input (SDIN) is muted. The default
state of this bit is the inverse of SPE
in the Hardware Configuration Data,
Mono & DSP Port byte.
Reserved, backwards compatible.
When set to 1, the extended
registers X12 and X13 are used to
set the sample rate, and registers I8,
I10 (OSM1,0), and I22 are ignored.
X12 and X13 cannot be modified un-
less this bit is set to 1.
Right DAC1 Input Mixer Mute.
When set to 1, the output from the
Right DAC1 is muted to the Right in-
put mixer. See Figure 4.
Right DSP Serial Port Mute. When
Independent Sample Freq. Enable.
IFSE
D5
D4
rbc
D4
D4
rbc
rbc
TM
D4
res
D3
rbc
D3
rbc
D3
rbc
D3
res
D2
D2
rbc
D2
rbc
rbc
D2
res
D1
D1
D1
rbc
rbc
rbc
CS4239
D1
res
D0
D0
D0
rbc
rbc
rbc
D0
res
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