upd78f0103 Renesas Electronics Corporation., upd78f0103 Datasheet - Page 477

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upd78f0103

Manufacturer Part Number
upd78f0103
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet

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E.2 Revision History of Previous Editions
revision was applied.
2nd
2nd
(corrected
edition)
Edition
A history of the revisions up to this edition is shown below. “Applied to:” indicates the chapters to which the
X1 input clock oscillation stabilization time
2
Modification of Figure 4-5 Block Diagram of P10
Modification of Table 4-3 Settings of Port Mode Register and Output Latch
When Alternate-Function Is Used
Modification of Figure 5-6 Format of Oscillation Stabilization Time Counter
Status Register (OSTC)
Modification of Figure 5-7 Format of Oscillation Stabilization Time Select
Register (OSTS)
Addition of 5.7 Clock Selection Flowchart and Register Settings
Addition of Remark to 12.1 Functions of Serial Interface UART6
Addition of Reset to Table 14-1 Interrupt Source List
Modification of Figure 15-2 Format of Oscillation Stabilization Time Counter
Status Register (OSTC)
Modification of Figure 15-3 Format of Oscillation Stabilization Time Select
Register (OSTS)
Addition of CHAPTER 25 RETRY
Modification of reset value of the following register in Table 3-5 Special Function
Register List
Modification of manipulatable bit unit of the following registers in Table 3-5 Special
Function Register List
Modification of manipulatable bit unit in 5.3 (5) Oscillation stabilization time
counter status register (OSTC)
Modification of Figure 5-11 Status Transition Diagram
Modification of Table 5-3 Relationship Between Operation Clocks in Each
Operation Status
Modification of Table 5-4 Oscillation Control Flags and Clock Oscillation Status
Modification of Table 5-6 Clock and Register Settings
Modification of reset value in 6.2 (2) 16-bit timer capture/compare register 000
(CR000) and (3) 16-bit timer capture/compare register 010 (CR010)
Modification of manipulatable bit unit in 6.3 (4) Prescaler mode register 00
(PRM00)
Modification of Caution in 9.4.2 Watchdog timer operation when “Ring-OSC can
be stopped by software” is selected by mask option
Modification of 9.4.3 Watchdog timer operation in STOP mode (when “Ring-
OSC can be stopped by software” is selected by mask option)
12
Serial I/O shift register 10 (SIO10)
Oscillation stabilization time counter status register (OSTC)
Interrupt request flag register 1L (IF1L)
Interrupt mask flag register 1L (MK1L)
Priority specification flag register 1L (PR1L)
/f
X
, 2
14
/f
X
, 2
15
/f
X
, 2
16
/f
X
, 2
17
/f
X
2
11
APPENDIX E REVISION HISTORY
/f
X
, 2
Description
User’s Manual U15836EJ5V0UD
13
/f
X
, 2
14
/f
X
, 2
15
/f
X
, 2
16
/f
X
Throughout
CHAPTER 4
PORT FUNCTIONS
CHAPTER 5
CLOCK GENERATOR
CHAPTER 12
SERIAL INTERFACE UART6
CHAPTER 14
INTERRUPT FUNCTIONS
CHAPTER 15
STANDBY FUNCTION
CHAPTER 25 RETRY
CHAPTER 3 CPU
ARCHITECTURE
CHAPTER 5 CLOCK
GENERATOR
CHAPTER 6 16-BIT
TIMER/EVENT COUNTER 00
CHAPTER 9 WATCHDOG
TIMER
Applied to:
(1/9)
477

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