upd78f0103 Renesas Electronics Corporation., upd78f0103 Datasheet - Page 256
upd78f0103
Manufacturer Part Number
upd78f0103
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0103.pdf
(485 pages)
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(f) Reception error
Three types of errors may occur during reception: a parity error, framing error, or overrun error. If the error
flag of asynchronous serial interface reception error status register 6 (ASIS6) is set as a result of data
reception, a reception error interrupt request (INTSR6/INTSRE6) is generated.
Which error has occurred during reception can be identified by reading the contents of ASIS6 in the reception
error interrupt servicing (INTSR6/INTSRE6) (see Figure 12-6).
The contents of ASIS6 are reset to 0 when ASIS6 is read.
The error interrupt can be separated into reception completion interrupt (INTSR6) and error interrupt
(INTSRE6) by clearing bit 0 (ISRM6) of asynchronous serial interface operation mode register 6 (ASIM6) to
0.
1. If ISRM6 is cleared to 0 (reception completion interrupt (INTSR6) and error interrupt (INTSRE6) are
2. If ISRM6 is set to 1 (error interrupt is included in INTSR6)
INTSRE6
INTSRE6
INTSR6
INTSR6
separated)
(a) No error during reception
(a) No error during reception
Parity error
Framing error
Overrun error
Reception Error
CHAPTER 12 SERIAL INTERFACE UART6
Figure 12-20. Reception Error Interrupt
Table 12-3. Cause of Reception Error
The parity specified for transmission does not match the parity of the
receive data.
Stop bit is not detected.
Reception of the next data is completed before data is read from
receive buffer register 6 (RXB6).
User’s Manual U15836EJ5V0UD
INTSRE6
INTSRE6
INTSR6
INTSR6
Cause
(b) Error during reception
(b) Error during reception
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