upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 75

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

(2) Crystal/ceramic oscillator
Notes 1. Operation stop time is 276
If crystal/ceramic oscillation is selected by the option byte, a clock frequency of 1 MHz to 10 MHz can be selected
and the accuracy of processing is improved because the frequency deviation is small, as compared with high-
speed internal oscillation (8 MHz (TYP.)).
Figures 5-10 and 5-11 show the timing chart and status transition diagram of default start by the crystal/ceramic
oscillator.
(a) The internal reset signal is generated by the power-on clear function on power application, the option byte is
(b) After high-speed internal oscillation clock is generated, the option byte is referenced and the system clock is
(c) If the system clock is the crystal/ceramic oscillator clock, it starts operating as the CPU clock after clock
referenced after reset, and the system clock is selected.
selected. In this case, the crystal/ceramic oscillator clock is selected as the system clock.
oscillation is stabilized. The wait time is selected by the option byte. For details, refer to CHAPTER 15
OPTION BYTE.
2. The clock oscillation stabilization time for default start is selected by the option byte. For details, refer to
System clock
Internal reset
CPU clock
CHAPTER 15 OPTION BYTE. The oscillation stabilization time that elapses after the STOP mode is
released is selected by the oscillation stabilization time select register (OSTS).
RESET
V
Figure 5-10. Timing Chart of Default Start by Crystal/Ceramic Oscillator
DD
H
(a)
System clock is selected.
(Operation stops
µ
CHAPTER 5 CLOCK GENERATORS
Option byte is read.
s (MIN.), 544
User’s Manual U16994EJ3V0UD
Note 1
µ
)
s (TYP.), and 1.074 ms (MAX.).
(b)
Clock oscillation
stabilization
time
Note 2
(c)
PCC = 02H, PPCC = 02H
Crystal/ceramic
oscillator clock
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