upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 93
upd70f3017ay
Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3017AY.pdf
(492 pages)
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4.5 Wait Function
4.5.1 Programmable wait function
that starts every two memory blocks.
system has been reset, a state in which three data waits are inserted is automatically programmed for all memory
blocks.
(1) Data wait control register (DWC)
After reset: FFFFH
Symbol
DWC
To facilitate interfacing with low-speed memories and I/O devices, up to 3 data waits can be inserted in a bus cycle
The number of waits can be programmed by using the data wait control register (DWC). Immediately after the
This register can be read/written in 16-bit units.
Block 0 is reserved for the internal ROM area. It is not subject to programmable wait control, regardless of the
setting of DWC, and is always accessed without wait states.
The internal RAM area of block 15 is not subject to programmable wait control and is always accessed without
wait states. The on-chip peripheral I/O area of this block is not subject to programmable wait control either; only
wait control from each peripheral function is performed.
DW71
DWn1
15
0
0
1
1
n
0
1
2
3
4
5
6
7
DW70
DWn0
Blocks 0/1
Blocks 2/3
Blocks 4/5
Blocks 6/7
Blocks 8/9
Blocks 10/11
Blocks 12/13
Blocks 14/15
14
0
1
0
1
R/W
DW61
13
DW60
12
CHAPTER 4 BUS CONTROL FUNCTION
DW51
11
DW50
10
User’s Manual U12768EJ4V1UD
Address: FFFFF060H
Blocks into Which Wait States Are Inserted
DW41
9
Number of Wait States to Be Inserted
DW40
8
DW31
7
0
1
2
3
DW30
6
DW21
5
DW20
4
DW11
3
DW10
2
DW01
1
DW00
0
93
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