LM3S8971 Luminary Micro, Inc, LM3S8971 Datasheet - Page 6

• Manufacturer Part Number: LM3S8971
• Description: Lm3s8971 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
13.4
13.5
14
14.1
14.2
14.2.1 Bit Rate Generation ................................................................................................................. 344
14.2.2 FIFO Operation ....................................................................................................................... 344
14.2.3 Interrupts ................................................................................................................................ 344
14.2.4 Frame Formats ....................................................................................................................... 345
14.3
14.4
14.5
15
15.1
15.2
15.3
15.4
15.4.1 Initialization ............................................................................................................................. 382
15.4.2 Operation ............................................................................................................................... 382
15.4.3 Transmitting Message Objects ................................................................................................. 383
15.4.4 Configuring a Transmit Message Object .................................................................................... 383
15.4.5 Updating a Transmit Message Object ....................................................................................... 384
15.4.6 Accepting Received Message Objects ...................................................................................... 384
15.4.7 Receiving a Data Frame .......................................................................................................... 384
15.4.8 Receiving a Remote Frame ...................................................................................................... 384
15.4.9 Receive/Transmit Priority ......................................................................................................... 385
15.4.10 Configuring a Receive Message Object .................................................................................... 385
15.4.11 Handling of Received Message Objects .................................................................................... 386
15.4.12 Handling of Interrupts .............................................................................................................. 386
15.4.13 Bit Timing Configuration Error Considerations ........................................................................... 387
15.4.14 Bit Time and Bit Rate ............................................................................................................... 387
15.4.15 Calculating the Bit Timing Parameters ...................................................................................... 389
15.5
15.6
16
16.1
16.2
16.2.1 Internal MII Operation .............................................................................................................. 423
16.2.2 PHY Configuration/Operation ................................................................................................... 423
16.2.3 MAC Configuration/Operation .................................................................................................. 424
16.2.4 Interrupts ................................................................................................................................ 426
16.3
16.4
16.5
16.6
17
17.1
6
Register Map .......................................................................................................................... 308
Register Descriptions .............................................................................................................. 309
Synchronous Serial Interface (SSI) ................................................................................ 343
Block Diagram ........................................................................................................................ 343
Functional Description ............................................................................................................. 343
Initialization and Configuration ................................................................................................. 352
Register Map .......................................................................................................................... 353
Register Descriptions .............................................................................................................. 354
Controller Area Network (CAN) Module ......................................................................... 380
Controller Area Network Overview ............................................................................................ 380
Controller Area Network Features ............................................................................................ 380
Controller Area Network Block Diagram .................................................................................... 381
Controller Area Network Functional Description ......................................................................... 381
Controller Area Network Register Map ...................................................................................... 391
Register Descriptions .............................................................................................................. 392
Ethernet Controller .......................................................................................................... 421
Block Diagram ........................................................................................................................ 422
Functional Description ............................................................................................................. 422
Initialization and Configuration ................................................................................................. 427
Ethernet Register Map ............................................................................................................. 428
Ethernet MAC Register Descriptions ......................................................................................... 429
MII Management Register Descriptions ..................................................................................... 446
Analog Comparator ......................................................................................................... 465
Block Diagram ........................................................................................................................ 465
Preliminary
July 26, 2008