LM3S8971 Luminary Micro, Inc, LM3S8971 Datasheet - Page 548

• Manufacturer Part Number: LM3S8971
• Description: Lm3s8971 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Signal Tables
548
Table 21-6. Signals by Signal Name
Pin Number
M12
Pin Name
CAN0Rx
CAN0Tx
ERBIAS
CMOD0
CMOD1
Fault
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
CCP0
CCP1
CCP2
CCP3
CCP4
CCP5
C0+
C0-
C0o
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Pin Name
HIB
Pin Number
D12
C12
E12
E11
B10
L10
K10
F10
F12
J10
F11
M1
M2
M6
B1
A1
B3
B2
A2
A3
B4
A4
A7
A6
G1
G2
B7
K3
C4
C5
H3
K5
K6
B6
L6
J3
Preliminary
Pin Type
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
I
I
I
I
I
I
I
I
I
I
I
I
I
Buffer Type
Buffer Type
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Description
An output that indicates the processor is in
hibernate mode.
Description
Analog-to-digital converter input 0.
Analog-to-digital converter input 1.
Analog-to-digital converter input 2.
Analog-to-digital converter input 3.
Analog-to-digital converter input 4.
Analog-to-digital converter input 5.
Analog-to-digital converter input 6.
Analog-to-digital converter input 7.
Analog comparator 0 positive input
Analog comparator 0 negative input
Analog comparator 0 output
CAN module 0 receive
CAN module 0 transmit
Capture/Compare/PWM 0
Capture/Compare/PWM 1
Capture/Compare/PWM 2
Capture/Compare/PWM 3
Capture/Compare/PWM 1
Capture/Compare/PWM 5
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
12.4 KOhm resistor (1% precision) used
internally for Ethernet PHY.
PWM Fault
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
July 26, 2008