LM3S6952 Luminary Micro, Inc, LM3S6952 Datasheet - Page 431
LM3S6952
Manufacturer Part Number
LM3S6952
Description
Lm3s6952 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6952.pdf
(601 pages)
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Reset
Reset
Type
Type
Ethernet MAC Transmit Control (MACTCTL)
Base 0x4004.8000
Offset 0x00C
Type R/W, reset 0x0000.0000
July 25, 2008
Bit/Field
31:5
4
3
2
1
0
RO
RO
31
15
0
0
Register 5: Ethernet MAC Transmit Control (MACTCTL), offset 0x00C
This register enables software to configure the transmit module, and control frames are placed onto
the physical medium.
RO
RO
30
14
0
0
reserved
DUPLEX
reserved
RO
RO
29
13
PADEN
0
0
Name
TXEN
CRC
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
R/W
R/W
R/W
RO
RO
reserved
RO
RO
26
10
0
0
Reset
0x0
0x0
0x0
0x0
0x0
0x0
RO
RO
25
0
9
0
Preliminary
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Enable Duplex Mode
When set, enables Duplex mode, allowing simultaneous transmission
and reception.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Enable CRC Generation
When set, enables the automatic generation of the CRC and the
placement at the end of the packet. If this bit is not set, the frames placed
in the TX FIFO are sent exactly as they are written into the FIFO.
Enable Packet Padding
When set, enables the automatic padding of packets that do not meet
the minimum frame size.
Enable Transmitter
When set, enables the transmitter. When this bit is 0, the transmitter is
disabled.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
DUPLEX
R/W
RO
20
0
4
0
reserved
LM3S6952 Microcontroller
RO
RO
19
0
3
0
CRC
R/W
RO
18
0
2
0
PADEN
R/W
RO
17
0
1
0
TXEN
R/W
RO
16
0
0
0
431
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