LM3S6952 Luminary Micro, Inc, LM3S6952 Datasheet - Page 16
LM3S6952
Manufacturer Part Number
LM3S6952
Description
Lm3s6952 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6952.pdf
(601 pages)
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Table of Contents
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Universal Asynchronous Receivers/Transmitters (UARTs) ..................................................... 304
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
16
ADC Underflow Status (ADCUSTAT), offset 0x018 ........................................................... 287
ADC Sample Sequencer Priority (ADCSSPRI), offset 0x020 ............................................. 288
ADC Processor Sample Sequence Initiate (ADCPSSI), offset 0x028 ................................. 289
ADC Sample Averaging Control (ADCSAC), offset 0x030 ................................................. 290
ADC Sample Sequence Input Multiplexer Select 0 (ADCSSMUX0), offset 0x040 ............... 291
ADC Sample Sequence Control 0 (ADCSSCTL0), offset 0x044 ........................................ 293
ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048 ................................ 296
ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068 ................................ 296
ADC Sample Sequence Result FIFO 2 (ADCSSFIFO2), offset 0x088 ................................ 296
ADC Sample Sequence Result FIFO 3 (ADCSSFIFO3), offset 0x0A8 ............................... 296
ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0), offset 0x04C ............................. 297
ADC Sample Sequence FIFO 1 Status (ADCSSFSTAT1), offset 0x06C ............................. 297
ADC Sample Sequence FIFO 2 Status (ADCSSFSTAT2), offset 0x08C ............................ 297
ADC Sample Sequence FIFO 3 Status (ADCSSFSTAT3), offset 0x0AC ............................ 297
ADC Sample Sequence Input Multiplexer Select 1 (ADCSSMUX1), offset 0x060 ............... 298
ADC Sample Sequence Input Multiplexer Select 2 (ADCSSMUX2), offset 0x080 ............... 298
ADC Sample Sequence Control 1 (ADCSSCTL1), offset 0x064 ........................................ 299
ADC Sample Sequence Control 2 (ADCSSCTL2), offset 0x084 ........................................ 299
ADC Sample Sequence Input Multiplexer Select 3 (ADCSSMUX3), offset 0x0A0 ............... 301
ADC Sample Sequence Control 3 (ADCSSCTL3), offset 0x0A4 ........................................ 302
ADC Test Mode Loopback (ADCTMLB), offset 0x100 ....................................................... 303
UART Data (UARTDR), offset 0x000 ............................................................................... 312
UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 ........................... 314
UART Flag (UARTFR), offset 0x018 ................................................................................ 316
UART IrDA Low-Power Register (UARTILPR), offset 0x020 ............................................. 318
UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ............................................ 319
UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ....................................... 320
UART Line Control (UARTLCRH), offset 0x02C ............................................................... 321
UART Control (UARTCTL), offset 0x030 ......................................................................... 323
UART Interrupt FIFO Level Select (UARTIFLS), offset 0x034 ........................................... 325
UART Interrupt Mask (UARTIM), offset 0x038 ................................................................. 327
UART Raw Interrupt Status (UARTRIS), offset 0x03C ...................................................... 329
UART Masked Interrupt Status (UARTMIS), offset 0x040 ................................................. 330
UART Interrupt Clear (UARTICR), offset 0x044 ............................................................... 331
UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0 ..................................... 333
UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4 ..................................... 334
UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8 ..................................... 335
UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ..................................... 336
UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0 ...................................... 337
UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4 ...................................... 338
UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8 ...................................... 339
UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ..................................... 340
UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0 ........................................ 341
UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4 ........................................ 342
UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8 ........................................ 343
UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ........................................ 344
Preliminary
July 25, 2008
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