CY7C4245-15ASC Cypress Semiconductor Corp, CY7C4245-15ASC Datasheet - Page 11
![IC SYNC FIFO MEM 4KX18 64LQFP](/photos/6/76/67621/428-64-tqfp_sml.jpg)
CY7C4245-15ASC
Manufacturer Part Number
CY7C4245-15ASC
Description
IC SYNC FIFO MEM 4KX18 64LQFP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Specifications of CY7C4245-15ASC
Function
Synchronous
Memory Size
72K (4K x 18)
Data Rate
100MHz
Access Time
10ns
Voltage - Supply
3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Configuration
Dual
Density
72Kb
Access Time (max)
10ns
Word Size
18b
Organization
4Kx18
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
TQFP
Clock Freq (max)
66.7MHz
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
45mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1225
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C4245-15ASC
Manufacturer:
CYPRESS
Quantity:
1 831
Company:
Part Number:
CY7C4245-15ASC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-06029 Rev. *C
Switching Waveforms
Read Cycle Timing
Notes:
Reset Timing
15. t
16. The clocks (RCLK, WCLK) can be free-running during reset.
17. After reset, the outputs will be LOW if OE = 0 and three-state if OE = 1.
REN, WEN,
between the rising edge of WCLK and the rising edge of RCLK is less than t
SKEW2
Q
0
EF,PAE
FF,PAF,
Q
WCLK
RCLK
–Q
WEN
REN
0
–Q
is the minimum time between a rising WCLK edge and a rising RCLK edge to guarantee that EF will go HIGH during the current clock cycle. It the time
OE
EF
17
RS
HF
LD
17
[16]
t
ENS
t
OLZ
(continued)
t
ENH
t
CLKH
t
t
A
REF
t
t
t
RSF
RSF
RSF
t
OE
t
RS
t
CLK
t
SKEW2
NO OPERATION
[15]
t
CLKL
SKEW2
, then EF may not change state until the next RCLK edge.
VALID DATA
t
RSR
t
REF
CY7C4225V/4205V/4215V
CY7C4425V/4235V/4245V
t
OHZ
OE = 1
OE = 0
Page 11 of 20
[17]
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