74AHC257 Philips Semiconductors, 74AHC257 Datasheet - Page 2

• Manufacturer Part Number: 74AHC257
• Description: Quad 2-input multiplexer; 3-state
• Manufacturer: Philips Semiconductors

Philips Semiconductors
FEATURES
DESCRIPTION
The 74AHC/AHCT257 are high-speed Si-gate CMOS
devices and are pin compatible with Low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard No. 7A.
The 74AHC/AHCT257 has four identical 2-input
multiplexers with 3-state outputs, which select 4 bits of
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. The condition is V
2000 Apr 03
t
C
C
C
PHL
SYMBOL
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101 exceeds 1000 V
Balanced propagation delays
All inputs have Schmitt-trigger actions
Non-inverting data path
Inputs accept voltages higher than V
For AHC only: operates with CMOS input levels
For AHCT only: operates with TTL input levels
Specified from 40 to +85 C and 40 to +125 C.
I
O
PD
Quad 2-input multiplexer; 3-state
P
f
f
C
V
i
o
/t
D
CC
PD
= input frequency in MHz;
L
PLH
= output frequency in MHz;
(C
= output load capacitance in pF;
= C
is used to determine the dynamic power dissipation (P
= supply voltage in Volts.
L
PD
V
amb
CC
propagation delay
input capacitance
output capacitance
power dissipation
capacitance
V
2
nl
S to nY
CC
= 25 C; t
0
f
2
, nI
o
) = sum of outputs;
I
PARAMETER
1
f
= GND to V
i
to nY
+
r
= t
(C
f
L
3.0 ns.
CC
V
CC
.
2
CC
f
o
) where:
C
C
V
C
I
L
L
L
4 outputs switching via input S
1 output switching via input I
= V
= 15 pF; V
= 15 pF; V
= 50 pF; f
CC
or GND
CONDITIONS
2
i
CC
CC
= 1 MHz; notes 1 and 2
data from two sources and are controlled by a common
data select input (S).
The data inputs from source 0 (1I
when input S is LOW and the data inputs from source 1
(1I
the outputs (1Y to 4Y) in true (non-inverting) form from the
selected inputs.
The 74AHC/AHCT257 is the logic implementation of a
4-pole 2-position switch, where the position of the switch is
determined by the logic levels applied to S. The outputs
are forced to a high impedance OFF-state when OE is
HIGH.
If OE is LOW then the logic equations for the outputs are:
1Y = 1I
2Y = 2I
3Y = 3I
4Y = 4I
The ‘257’ is identical to the ‘258’ but has non-inverting
(true) outputs.
D
= 5 V
= 5 V
1
in W).
to 4I
1
1
1
1
1
) are selected when S is HIGH. Data appears at
S + 1I
S + 2I
S + 3I
S + 4I
0
0
0
0
S;
S;
S;
S.
2.9
3.5
3.0
4.0
45
15
AHC
TYPICAL
0
Product specification
to 4I
3.7
5.1
3.0
4.0
51
15
74AHCT257
74AHC257;
AHCT
0
) are selected
ns
ns
pF
pF
pF
pF
UNIT